How to define dynamic Target/Prerequisite in Makefile?
I am writing a Makefile for Cobol on Linux.My sample Makefile looks like below.
I do not want to Hardcode Program names in Makefile.Is there any way we can mention directories in Target and Prerequisites instead of File names sothat Makefile Pickup all the files in mentioned path as below.
================================
================================
currently I am using following command which I can trigger thru Shell script.
-bash-3.2$ make sourcename=A
-bash-3.2$ make sourcename=B
-bash-3.2$ make sourcename=C
-bash-3.2$ make sourcename=D
looking forward for inputs on this.
Note .cbl is a extension for cobol code and .int is its exectable
Last edited by vbe; 09-27-2011 at 07:23 AM..
Reason: code tags next time...
Wildcards ought to work to match more than one thing in one statement, but you'd have to be careful not to get multiple targets in one rule unless that one rule can actually make all those targets.
Can you show us your makefile ( or what you have done so far) so we get a clear view of what you desire? What is the makefile for? ( compile cobol source or compile cobol compiler...) What cobol are you using?
Hi Vbe I have already posted a Makefile while starting this Post.This Makefile is to compile a cobol source.cobol under consideration is Microfocus cobol.However you can assume any standard syntax of any source as below
************************************
all:Target
Target file name:Source file name
<tab> command for compilation of source
************************************
Here am looking if it is possible to that Makefile refer to a directory which has unkonown number of files and create dependency for all based on predefined rules.eg.I have directory /home/usr/usr1 which has lets say thousan source codes.I hope this explains the scenarion.Please suggests if it is posssible this way??
These are to be compiled individually and not to be linked. A.cbl gets compiled to A.int and can be directly executed independent of other executables.
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i will tell my problem with example:
if i have a folder name called sree1.7.3
i know the starting name say sree and also path say /usr/lib.
so i want the folder name.
and how can i link this folder in makefile
thank u
sree (1 Reply)
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Error Snippet :-
----------------------
Makefile:57: *** multiple target patterns. Stop.
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