write() issue during a low level hdd access Post: 302397636

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Top Forums Programming write() issue during a low level hdd access Post 302397636 by Corona688 on Monday 22nd of February 2010 09:09:20 PM

02-22-2010

Registered User

Quote:

Originally Posted by sponnusa

Also, according to the ata specifications, timeout would be only for certain operations and ranges in the order of nanaseconds (400ns is default i believe).
And might not work in this case as it has to pass through the kernel / driver layers.

I think you're looking at the over-the-cable protocol, not how data is communicated. It's not synchronous -- after all, one seek alone might take considerably longer than 400 nanoseconds. So the computer can tell the drive "do a big DMA transfer and send an interrupt once the data's actually in memory." and the drive will answer in 400 nanoseconds, "OK I will do a big DMA transfer". But the transfer itself can take an unspecified amount of time.

Quote:

In one of the earlier posts, you pointed out about the option of having a driver for talking to the drives. Is there any generic direction / pointers you can point to or I should start at libata / scsi drivers?

I was not being facetous when I suggested the linux kernel mailing list. They'd know far better than we would about low-level I/O.

Yes, hdparm only works for SATA and IDE. You want raw I/O, so you'll have to speak the drive's language.

Last edited by Corona688; 02-22-2010 at 10:28 PM..

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LEARN ABOUT NETBSD

piixide

PIIXIDE(4)						   BSD Kernel Interfaces Manual 						PIIXIDE(4)

NAME

     piixide -- Intel IDE/SATA disk controllers driver

SYNOPSIS

     piixide* at pci? dev ? function ? flags 0x0000

DESCRIPTION

     The piixide driver supports the Intel PIIX, PIIX3, PIIX4, and 82801 (ICH/ICH0/ICH2/ICH3/ICH4/ICH5/ICH6/ICH7/ICH8/ICH9/ICH10) IDE/SATA con-
     trollers and provides the interface with the hardware for the ata(4) driver.

     The 0x0002 flag forces the piixide driver to disable DMA on chipsets for which DMA would normally be enabled.  This can be used as a debug-
     ging aid, or to work around problems where the IDE controller is wired up to the system incorrectly.

SEE ALSO

     ata(4), atapi(4), intro(4), pci(4), pciide(4), wd(4), wdc(4)

BUGS

     The timings used for the PIO and DMA modes for controllers listed above are for a PCI bus running at 30 or 33 MHz.  This driver may not work
     properly on overclocked systems.

BSD
								   July 30, 2010							       BSD