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Top Forums UNIX for Dummies Questions & Answers make - two wildcards in the target Post 302492235 by Corona688 on Sunday 30th of January 2011 03:41:21 PM
Old 01-30-2011
Rather, I'd make one general rule which doesn't match all the files but DOES accept the input and output type you want. Then one great big rule that matches all inputs and produces all outputs, which make should deduce needs to call the general rule lots of times.
 

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MAKE(1) 						      General Commands Manual							   MAKE(1)

NAME
make - a program for maintaining large programs SYNOPSIS
make [-f file] [-iknpqrst] [option] ... [target] OPTIONS
-f Use file as the makefile -i Ignore status returned by commands -k On error, skip to next command -n Report, but do not execute -p Print macros and targets -q Question up-to-dateness of target -r Rule inhibit; do not use default rules -s Silent mode -t Touch files instead of making them EXAMPLES
make kernel # Make kernel up to date make -n -f mfile # Tell what needs to be done DESCRIPTION
Make is a program that is normally used for developing large programs consisting of multiple files. It keeps track of which object files depend on which source and header files. When called, it does the minimum amount of recompilation to bring the target file up to date. The file dependencies are expected in makefile or Makefile , unless another file is specified with -f. Make has some default rules built in, for example, it knows how to make .s files from .c files. Here is a sample makefile . d=/user/ast # d is a macro program: head.s tail.s# program depends on these cc -o program head.s tail.s# tells how to make program echo Program done. # announce completion head.s: $d/def.h head.c # head.s depends on these tail.s: $d/var.h tail.c # tail.s depends on these A complete description of make would require too much space here. Many books on UNIX discuss make . Study the numerous Makefiles in the MINIX source tree for examples. SEE ALSO
cc(1). MAKE(1)
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