makefile Q about targets $@


 
Thread Tools Search this Thread
# 1  
MySQL makefile Q about targets $@

Hi All

I need to parse the target
something like:

ifeq '$@' 'first'
echo 1 $@
endif
ifeq '$@' 'second'
echo 2 $@
endif

The thing is to be able compare the target string to any string and then do the commands
Thanks a lot
ziv
zivsegal
 

Previous Thread | Next Thread
Thread Tools Search this Thread
Search this Thread:
Advanced Search

Test Your Knowledge in Computers #216
Difficulty: Easy
A network operating system is a specialized operating system for a social media company, like Facebook or Google.
True or False?

6 More Discussions You Might Find Interesting

1. Shell Programming and Scripting

Question in creating targets in makefile

Hi, I have a question related to makefile. I'm new to makefile and I'm in the process of writing a makefile for my RBT build. I have multiple source files and when I compile them I will get multiple object files (one object file for each source file). I'm having problem in creating a target for... (1 Reply)
Discussion started by: Anand Venkatesa
1 Replies

2. Homework & Coursework Questions

Help with Simple Multi-Level Makefile (Extremely New at Makefile)

Use and complete the template provided. The entire template must be completed. If you don't, your post may be deleted! 1. The problem statement, all variables and given/known data: Basically, the prompt is make a makefile with various sub makefiles in their respective subdirectories. All code... (1 Reply)
Discussion started by: Tatl
1 Replies

3. UNIX for Advanced & Expert Users

makefile head-scratcher: multiple targets in one go

Hi! I've got a build process where scripts create multiple targets from their sources. But here I'm running into a conceptual problem of GNU make: If one has multiple targets in a dependency, make applies the rules once for every target that is out of sync - which is correct for normal... (3 Replies)
Discussion started by: treczoks
3 Replies

4. UNIX for Advanced & Expert Users

Makefile problem - How to run module load in a Makefile

Hi, I'm trying to run the module load command in a Makefile and i'm getting the following error: make: module: command not found Why is this? Is there any way to run this command in a Makefile? NOTE: command - module load msjava/sunjdk/1.5.0 works fine outside of the Makefile (2 Replies)
Discussion started by: hernandinho
2 Replies

5. Solaris

Testing targets of link files > ln -s

Hi all Ive been given the task to write a script that tests that certain link files work, i.e. the physical directory the link points too, is actually there. Now, before I go down the route of ls -l | awk ...... or using test or find, is there a far more simpler command that I can use ? ... (2 Replies)
Discussion started by: sbk1972
2 Replies

6. UNIX for Dummies Questions & Answers

Shell Command for Symbolic Link Targets

**DUP post in Shell Programming and Scripting *** Hello, I'm still learning the ins and outs of how to combine multiple Unix commands together (specifically AIX), but I'm looking to do the following (only on local files): 1. Find all symbolic links that are not set up using absolute... (3 Replies)
Discussion started by: bdizenhouse
3 Replies
md(1)							    BSD General Commands Manual 						     md(1)

NAME
md -- process raw dependency files produced by cpp -MD SYNOPSIS
md [-d] [-f] [-m makefile] [-u makefile] [-o outputfile] [-v] [-x] [-D c|d|m|o|t|D] DESCRIPTION
The md command basically does two things: Process the raw dependency files produced by the cpp -MD option. There is one line in the file for every #include encountered, but there are repeats and patterns like .../dir1/../dir2 that appear which should reduce to .../dir2. md canonicalizes and flushes repeats from the depen- dency list. It also sorts the file names and "fills" them to a 78 character line. md also updates the makefile directly with the dependency information, so the .d file can be thrown away (see d option). This is done to save space. md assumes that dependency information in the makefile is sorted by .o file name and it procedes to merge in (add/or replace [as appropriate]) the new dependency lines that it has generated. For time effeciency, md assumes that any .d files it is given that were cre- ated before the creation date of the "makefile" were processed already. It ignores them unless the force flag [f] is given. FLAG SUMMARY
-d delete the .d file after it is processed -f force an update of the dependencies in the makefile even though the makefile is more recent than the .n file (This implies that md has been run already.) -m makefile specify the makefile to be upgraded. The defaults are makefile and then Makefile -u makefile like -m above, but the file will be created if necessary -o outputfile specify an output file for the dependencies other than a makefile -v set the verbose flag -x expunge old dependency info from makefile -D c|d|m|o|t|D subswitch for debugging. can be followed by any of "c", "d", "m", "o", "t", "D" meaning: c show file contents d show new dependency crunching m show generation of makefile o show files being opened t show time comparisons D show very low level debugging SEE ALSO
make(1) BUGS
Old, possibly not used by anyone. HISTORY
The md utility was written by Robert V Baron at Carnegie-Mellon University. BSD
June 2, 2019 BSD

Featured Tech Videos