I always appreciate your help. I am an electrical engineer. I am using a tool for timing analysis of a circuit. I would like to interpolate results from two timing reports at different voltages (0.945V and 0.78V). If voltage is decreased, data arrival time is increased.
For example,
At 0.945V, data arrival time is 0.70
At 0.78V, data arrival time is 0.72
I wanted to know voltage when the data arrival time reaches 0.714 using a linear interpolation.
In this case, I could calculate
(0.78-0.945)/(0.72-0.70)*0.714+(0.945-0.70*(0.78-0.945)/(0.72-0.70))
Voltage information such 0.78, 0.945 and the target data arrival time 0.714 are fixed. However, data arrival times at 0.945V and 0.78V are changed.
There is one more requirement. If data arrival time at 0.945V is above 0.714, then output is 0.714.
0p945.rpt_in:
Code:
Startpoint: dtu_inst_d[23]
(input port)
Endpoint: ifu_exu_aluop_d[0]
(output port)
Path Group: (none)
Path Type: max
Point Incr Path
----------------------------------------------------------------------
input external delay 0.00 0.00 f
dtu_inst_d[23] (in) 0.00 0.00 f
U533/Y (INVX16_LVT) 0.52 0.52 r
U739/Y (AND4X1_LVT) 0.07 0.58 r
U572/Y (NAND4X0_LVT) 0.05 0.64 f
U607/Y (INVX0_LVT) 0.04 0.68 r
U609/Y (AO221X1_LVT) 0.02 0.70 r
ifu_exu_aluop_d[0] (out) 0.00 0.70 r
data arrival time 0.70
----------------------------------------------------------------------
(Path is unconstrained)
Startpoint: dtu_inst_d[21]
(input port)
Endpoint: imsk_ff_q_reg_0_
(rising edge-triggered flip-flop clocked by rclk)
Path Group: (none)
Path Type: max
Point Incr Path
----------------------------------------------------------------------
input external delay 0.00 0.00 f
dtu_inst_d[21] (in) 0.00 0.00 f
U613/Y (INVX8_LVT) 0.44 0.44 r
U702/Y (XOR2X1_LVT) 0.08 0.52 r
U984/Y (NAND4X0_LVT) 0.04 0.56 f
U604/Y (OR3X1_LVT) 0.05 0.61 f
U605/Y (AO22X1_LVT) 0.04 0.65 f
U986/Y (NOR4X1_LVT) 0.06 0.71 r
imsk_ff_q_reg_0_/D (DFFX1_LVT) 0.02 0.73 r
data arrival time 0.73
----------------------------------------------------------------------
(Path is unconstrained)
.
.
.
0p78.rpt_in:
Code:
Startpoint: dtu_inst_d[23]
(input port)
Endpoint: ifu_exu_aluop_d[0]
(output port)
Path Group: (none)
Path Type: max
Point Incr Path
----------------------------------------------------------------------
input external delay 0.00 0.00 f
dtu_inst_d[23] (in) 0.00 0.00 f
U533/Y (INVX16_LVT) 0.52 0.52 r
U739/Y (AND4X1_LVT) 0.07 0.58 r
U572/Y (NAND4X0_LVT) 0.05 0.64 f
U607/Y (INVX0_LVT) 0.04 0.68 r
U609/Y (AO221X1_LVT) 0.05 0.72 r
ifu_exu_aluop_d[0] (out) 0.00 0.72 r
data arrival time 0.72
----------------------------------------------------------------------
(Path is unconstrained)
Startpoint: dtu_inst_d[21]
(input port)
Endpoint: imsk_ff_q_reg_0_
(rising edge-triggered flip-flop clocked by rclk)
Path Group: (none)
Path Type: max
Point Incr Path
----------------------------------------------------------------------
input external delay 0.00 0.00 f
dtu_inst_d[21] (in) 0.00 0.00 f
U613/Y (INVX8_LVT) 0.44 0.44 r
U702/Y (XOR2X1_LVT) 0.08 0.52 r
U984/Y (NAND4X0_LVT) 0.04 0.56 f
U604/Y (OR3X1_LVT) 0.05 0.61 f
U605/Y (AO22X1_LVT) 0.04 0.65 f
U986/Y (NOR4X1_LVT) 0.06 0.71 r
imsk_ff_q_reg_0_/D (DFFX1_LVT) 0.05 0.76 r
data arrival time 0.76
----------------------------------------------------------------------
(Path is unconstrained)
.
.
.
Output.rpt_in needs to be:
Code:
Startpoint: dtu_inst_d[23]
(input port)
Endpoint: ifu_exu_aluop_d[0]
(output port)
Path Group: (none)
Path Type: max
Point Incr Path
----------------------------------------------------------------------
input external delay 0.00 0.00 f
dtu_inst_d[23] (in) 0.00 0.00 f
U533/Y (INVX16_LVT) 0.52 0.52 r
U739/Y (AND4X1_LVT) 0.07 0.58 r
U572/Y (NAND4X0_LVT) 0.05 0.64 f
U607/Y (INVX0_LVT) 0.04 0.68 r
U609/Y (AO221X1_LVT) 0.05 0.72 r
ifu_exu_aluop_d[0] (out) 0.00 0.72 r
data arrival time 0.8295
----------------------------------------------------------------------
(Path is unconstrained)
Startpoint: dtu_inst_d[21]
(input port)
Endpoint: imsk_ff_q_reg_0_
(rising edge-triggered flip-flop clocked by rclk)
Path Group: (none)
Path Type: max
Point Incr Path
----------------------------------------------------------------------
input external delay 0.00 0.00 f
dtu_inst_d[21] (in) 0.00 0.00 f
U613/Y (INVX8_LVT) 0.44 0.44 r
U702/Y (XOR2X1_LVT) 0.08 0.52 r
U984/Y (NAND4X0_LVT) 0.04 0.56 f
U604/Y (OR3X1_LVT) 0.05 0.61 f
U605/Y (AO22X1_LVT) 0.04 0.65 f
U986/Y (NOR4X1_LVT) 0.06 0.71 r
imsk_ff_q_reg_0_/D (DFFX1_LVT) 0.05 0.76 r
data arrival time 0.714
----------------------------------------------------------------------
(Path is unconstrained)
.
.
.
There are more than 1000 paths in each file.
I think awk can do this, but I don't know how to do. Any help is appreciated. Thanks in advance.
For each file, there's two data arrival times. Which one do you want to be recalculated? And, how do you get at 0.8295 for the first entry of the output?
How and where is the voltage mentioned? Just in the file name?
Both data arrival times need to be calculated. The first calculated output, 0.8295 is an interpolation result from (0.78-0.945)/(0.72-0.70)*0.714+(0.945-0.70*(0.78-0.945)/(0.72-0.70)).
The other calculated output, 0.714 is obtained without the calculation since the data arrival time at 0.945V is above 0.714 so it would be 0.714.
Let me clarify one thing again. I would like to find voltage when the data arrival time reaches 0.714 using a linear interpolation and replace the calculated voltage with the data arrival time
You didn't answer the question for the source of the voltages so a generic proposal was impossible.
Your solution may work for exactly 0.78 V and 0.945 V but no other input, so it may be not too valueable.
Why did you define the "time" variable? Why the "V" array?
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