Makefile with multiple executables


 
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# 1  
Old 04-25-2013
Makefile with multiple executables

Code:
CROSS_COMPILE?=

LIBDIR_APP_LOADER?=../../../../app_loader/lib
INCDIR_APP_LOADER?=../../../../app_loader/include
BINDIR?=../../bin

CFLAGS+= -Wall -I$(INCDIR_APP_LOADER) -D__DEBUG -O2 -mtune=cortex-a8 -march=armv7-a -std=gnu99
LDFLAGS+=-L$(LIBDIR_APP_LOADER) -lprussdrv -lpthread
OBJDIR=obj
TARGET=$(BINDIR)/manufacture_code

_DEPS = 
DEPS = $(patsubst %,$(INCDIR_APP_LOADER)/%,$(_DEPS))

_OBJ = manufacture_code.o
OBJ = $(patsubst %,$(OBJDIR)/%,$(_OBJ))

$(OBJDIR)/%.o: %.c $(DEPS)
    @mkdir -p obj
    $(CROSS_COMPILE)gcc $(CFLAGS) -c -o $@ $< 

$(TARGET): $(OBJ)
    $(CROSS_COMPILE)gcc $(CFLAGS) -o $@ $^ $(LDFLAGS)

.PHONY: clean

clean:
    rm -rf $(OBJDIR)/ *~  $(INCDIR_APP_LOADER)/*~  $(TARGET)

I want to make 9 executables for
Quote:
#1. name.c & name.o (./ name )
#2. revision.c & revision.o ( ./revision )
...
#9. cali_info.c & cali_info.o ( ./cali_info )
I am pretty new at this so I was wondering how to make 9 executables with 1 makefile.

Thanks for the help Smilie

- Smilie
# 2  
Old 04-25-2013
Lump several end-targets into into one big 'all' target.

Code:
all:executable1 executable2 executable3

executable1:input1.o
        $(CC) $(LDFLAGS) $^ -o $@

executable2:input3.o
        $(CC) $(LDFLAGS) $^ -o $@

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