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Top Forums Shell Programming and Scripting Makefile with multiple executables Post 302798923 by bpetersen on Thursday 25th of April 2013 10:40:26 AM
Old 04-25-2013
Makefile with multiple executables

Code:
CROSS_COMPILE?=

LIBDIR_APP_LOADER?=../../../../app_loader/lib
INCDIR_APP_LOADER?=../../../../app_loader/include
BINDIR?=../../bin

CFLAGS+= -Wall -I$(INCDIR_APP_LOADER) -D__DEBUG -O2 -mtune=cortex-a8 -march=armv7-a -std=gnu99
LDFLAGS+=-L$(LIBDIR_APP_LOADER) -lprussdrv -lpthread
OBJDIR=obj
TARGET=$(BINDIR)/manufacture_code

_DEPS = 
DEPS = $(patsubst %,$(INCDIR_APP_LOADER)/%,$(_DEPS))

_OBJ = manufacture_code.o
OBJ = $(patsubst %,$(OBJDIR)/%,$(_OBJ))

$(OBJDIR)/%.o: %.c $(DEPS)
    @mkdir -p obj
    $(CROSS_COMPILE)gcc $(CFLAGS) -c -o $@ $< 

$(TARGET): $(OBJ)
    $(CROSS_COMPILE)gcc $(CFLAGS) -o $@ $^ $(LDFLAGS)

.PHONY: clean

clean:
    rm -rf $(OBJDIR)/ *~  $(INCDIR_APP_LOADER)/*~  $(TARGET)

I want to make 9 executables for
Quote:
#1. name.c & name.o (./ name )
#2. revision.c & revision.o ( ./revision )
...
#9. cali_info.c & cali_info.o ( ./cali_info )
I am pretty new at this so I was wondering how to make 9 executables with 1 makefile.

Thanks for the help Smilie

- Smilie
 

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gccmakedep(1)						      General Commands Manual						     gccmakedep(1)

NAME
gccmakedep - create dependencies in makefiles using 'gcc -M' SYNOPSIS
gccmakedep [ -sseparator ] [ -fmakefile ] [ -a ] [ -- options -- ] sourcefile ... DESCRIPTION
The gccmakedep program calls 'gcc -M' to output makefile rules describing the dependencies of each sourcefile, so that make(1) knows which object files must be recompiled when a dependency has changed. By default, gccmakedep places its output in the file named makefile if it exists, otherwise Makefile. An alternate makefile may be speci- fied with the -f option. It first searches the makefile for a line beginning with # DO NOT DELETE or one provided with the -s option, as a delimiter for the dependency output. If it finds it, it will delete everything following this up to the end of the makefile and put the output after this line. If it doesn't find it, the program will append the string to the makefile and place the output after that. EXAMPLE
Normally, gccmakedep will be used in a makefile target so that typing 'make depend' will bring the dependencies up to date for the make- file. For example, SRCS = file1.c file2.c ... CFLAGS = -O -DHACK -I../foobar -xyz depend: gccmakedep -- $(CFLAGS) -- $(SRCS) OPTIONS
The program will ignore any option that it does not understand, so you may use the same arguments that you would for gcc(1), including -D and -U options to define and undefine symbols and -I to set the include path. -a Append the dependencies to the file instead of replacing existing dependencies. -fmakefile Filename. This allows you to specify an alternate makefile in which gccmakedep can place its output. Specifying "-" as the file name (that is, -f-) sends the output to standard output instead of modifying an existing file. -sstring Starting string delimiter. This option permits you to specify a different string for gccmakedep to look for in the makefile. The default is "# DO NOT DELETE". -- options -- If gccmakedep encounters a double hyphen (--) in the argument list, then any unrecognized arguments following it will be silently ignored. A second double hyphen terminates this special treatment. In this way, gccmakedep can be made to safely ignore esoteric compiler arguments that might normally be found in a CFLAGS make macro (see the EXAMPLE section above). -D, -I, and -U options appearing between the pair of double hyphens are still processed normally. SEE ALSO
gcc(1), make(1), makedepend(1). AUTHOR
The version of the gccmakedep included in this X.Org Foundation release was originally written by the XFree86 Project based on code sup- plied by Hongjiu Lu. Colin Watson wrote this manual page, originally for the Debian Project, based partly on the manual page for makedepend(1). X Version 11 gccmakedep 1.0.2 gccmakedep(1)
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