Hi,
I am getting the following error while building on Solaris 64 , while I am trying to build.
Error Snippet :-
----------------------
Makefile:57: *** multiple target patterns. Stop.
make: Leaving directory `/work1/patch/vds6053sun64o/vobs/jvi'
make: *** Error 2
make: Leaving directory... (0 Replies)
Hi, I'm trying to run the module load command in a Makefile and i'm getting the following error:
make: module: command not found
Why is this? Is there any way to run this command in a Makefile?
NOTE: command - module load msjava/sunjdk/1.5.0 works fine outside of the Makefile (2 Replies)
Greetings!
Basically, I would like to properly handle this with gnu make:
alltools: my_tool mysecond_tool mythird_tool etc_tool
%_tool: dir1/%_tool.vf dir2/%_tool/subdir2/%_tool.ver
<tab>@echo done
%.vf:
<tab>RUN_VF $*
%.ver:
<tab>RUN_VER $*
So, if I were to do something like:... (0 Replies)
Greetings!
I'm fairly new to the unix world and I hope someone here can help me with my question. I'm using a Makefile to run a few programs and the final output is several .eps files. However I need them to be .pdf files, so I want to use epstopdf to convert the files.
Since I'm already... (6 Replies)
Hi All
I am creating a makefile and I want to do a clean section.
In the clean section I would like to check if the file exists and then delete it.
I always have an error 'unexpected end of file'
What's wrong in it?
Thanks
msntn
firstCpp: first.cpp
g++ -o first first.cpp
clean:
... (1 Reply)
Hi!
I've got a build process where scripts create multiple targets from their sources. But here I'm running into a conceptual problem of GNU make: If one has multiple targets in a dependency, make applies the rules once for every target that is out of sync - which is correct for normal... (3 Replies)
Use and complete the template provided. The entire template must be completed. If you don't, your post may be deleted!
1. The problem statement, all variables and given/known data:
Basically, the prompt is make a makefile with various sub makefiles in their respective subdirectories. All code... (1 Reply)
I have the following part of a makefile and want to simplify it
using rules rather than having to code the same two blocks
when I need ti build another program.
An having difficulty doing it
all: 1dvel2 1dvel 2dvel
... (8 Replies)
I am trying to create executables for the following files
Currently, I am making 9 different directories for for each. I would like to make 1 directory but everytime I try it does not work.
CROSS_COMPILE?=
# CROSS_COMPILE used to = arm-arago-linux-gnueabi... (1 Reply)
i don't know where to put this question hence it is here.
Presently, i have X unix machines which each of them running a set of executables with various unique configurations.
i would like to have run multiple set of machines the same set of executeables but each running different... (0 Replies)
Discussion started by: lchunleo
0 Replies
LEARN ABOUT CENTOS
gccmakedep
gccmakedep(1) General Commands Manual gccmakedep(1)NAME
gccmakedep - create dependencies in makefiles using 'gcc -M'
SYNOPSIS
gccmakedep [ -sseparator ] [ -fmakefile ] [ -a ] [ -- options -- ] sourcefile ...
DESCRIPTION
The gccmakedep program calls 'gcc -M' to output makefile rules describing the dependencies of each sourcefile, so that make(1) knows which
object files must be recompiled when a dependency has changed.
By default, gccmakedep places its output in the file named makefile if it exists, otherwise Makefile. An alternate makefile may be speci-
fied with the -f option. It first searches the makefile for a line beginning with
# DO NOT DELETE
or one provided with the -s option, as a delimiter for the dependency output. If it finds it, it will delete everything following this up
to the end of the makefile and put the output after this line. If it doesn't find it, the program will append the string to the makefile
and place the output after that.
EXAMPLE
Normally, gccmakedep will be used in a makefile target so that typing 'make depend' will bring the dependencies up to date for the make-
file. For example,
SRCS = file1.c file2.c ...
CFLAGS = -O -DHACK -I../foobar -xyz
depend:
gccmakedep -- $(CFLAGS) -- $(SRCS)
OPTIONS
The program will ignore any option that it does not understand, so you may use the same arguments that you would for gcc(1), including -D
and -U options to define and undefine symbols and -I to set the include path.
-a Append the dependencies to the file instead of replacing existing dependencies.
-fmakefile
Filename. This allows you to specify an alternate makefile in which gccmakedep can place its output. Specifying "-" as the file
name (that is, -f-) sends the output to standard output instead of modifying an existing file.
-sstring
Starting string delimiter. This option permits you to specify a different string for gccmakedep to look for in the makefile. The
default is "# DO NOT DELETE".
-- options --
If gccmakedep encounters a double hyphen (--) in the argument list, then any unrecognized arguments following it will be silently
ignored. A second double hyphen terminates this special treatment. In this way, gccmakedep can be made to safely ignore esoteric
compiler arguments that might normally be found in a CFLAGS make macro (see the EXAMPLE section above). -D, -I, and -U options
appearing between the pair of double hyphens are still processed normally.
SEE ALSO gcc(1), make(1), makedepend(1).
AUTHOR
The version of the gccmakedep included in this X.Org Foundation release was originally written by the XFree86 Project based on code sup-
plied by Hongjiu Lu.
Colin Watson wrote this manual page, originally for the Debian Project, based partly on the manual page for makedepend(1).
X Version 11 gccmakedep 1.0.2 gccmakedep(1)