10 More Discussions You Might Find Interesting
1. Shell Programming and Scripting
hi all,
i had the below script
x=`cat input.txt |wc -1`
awk 'NR>1 && NR<'$x' ' input.txt > output.txt
by using above script i am able to remove the head and tail part from the input file and able to append the output to the output.txt but if i run it for second time the output is... (2 Replies)
Discussion started by: hemanthsaikumar
2 Replies
2. Shell Programming and Scripting
Hi/ Hello all Guru here,
I am trying to create script to remove same content from other file, already tested few idea and found that in unix it is limited to sort and uniq. There is many script for removing duplicate content however to delete all same content is non. Need your help and guide .... (7 Replies)
Discussion started by: Mr_47
7 Replies
3. Shell Programming and Scripting
Here is the contents of test.txt
Dependencies Resolved
Changes in packages about to be updated:
ChangeLog for: 1:perl-Archive-Extract-0.38-131.el6_4.x86_64,
- Resolves: #915692 - CVE-2013-1667 (DoS in rehashing code)
Dependencies Resolved
Changes in packages about to be updated:
... (5 Replies)
Discussion started by: ashokvpp
5 Replies
4. Shell Programming and Scripting
Hi All,
I want to remove the content based on the header information .
Please find the example below.
File1.txt
Name|Last|First|Location|DepId|Depname|DepLoc
naga|rr|tion|hyd|1|wer|opr
Nava|ra|tin|gen|2|wera|opra
I have to search for the DepId and remove the data from the... (5 Replies)
Discussion started by: i150371485
5 Replies
5. Shell Programming and Scripting
How can I remove all data that contain domain e.g zzgh@something.com, sdd@something.com.my and gg@something.my in one file? so that i only have data without the domain in the file.
Here is the file structure "test.out"
more test.out
1 zzztop@b.com
1 zzzulll
1 zzzullll@s.com.my
... (4 Replies)
Discussion started by: Mr_47
4 Replies
6. Shell Programming and Scripting
Input
data_10 SSA
data_2 TYUE
data_3 PEOCV
data_6 SSAT
data_21 SSA
data_19 TYUEC
data_14 TYUE
data_15 SSA
data_32 PEOCV
.
.
Desired Output
data_10 SSA
data_2 TYUE
data_3 PEOCV
data_6 SSAT
data_19 TYUEC (9 Replies)
Discussion started by: patrick87
9 Replies
7. Shell Programming and Scripting
Hi, I have a file called fl_list consists of files i have to archive. I want to create a exception parm called except_parm, so if it finds the directory it will not archive these files and remove from fl_list.
$ cat fl_list
/apps/dev/ihub/ready/IA003B/IA003B_Deal_Header_yyyymmdd_hhmmss.txt... (1 Reply)
Discussion started by: k9cheung
1 Replies
8. Shell Programming and Scripting
i am a bit new to shell scripting
i have a file containing
xxxx xx xx
but i want to output the content as
xxxxxxxx.
thus removing the space.
any idea how i can do this (4 Replies)
Discussion started by: blackzinga
4 Replies
9. Shell Programming and Scripting
Hi
I have a big verilog file with multiple modules. Each module begin with the code word 'module <module-name>(ports,...)'
and end with the
'endmodule' keyword.
Could you please suggest the best way to split each of these modules into multiple files?
Thank you for the help.
Example of... (7 Replies)
Discussion started by: return_user
7 Replies
10. Shell Programming and Scripting
hey all, I have a file with records in following format
8-29-2006 13:01:45|ABC|45
8-29-2006 14:23:12|DEF|21
8-30-2006 00:04:57|ABC|34
I want to remove all yesterday records. Can anyone show me how? Thanks! (10 Replies)
Discussion started by: mpang_
10 Replies
Netlist::Cell(3pm) User Contributed Perl Documentation Netlist::Cell(3pm)
NAME
Verilog::Netlist::Cell - Instantiated cell within a Verilog Netlist
SYNOPSIS
use Verilog::Netlist;
...
my $cell = $module->find_cell ('cellname');
print $cell->name;
DESCRIPTION
A Verilog::Netlist::Cell object is created by Verilog::Netlist for every instantiation in the current module.
ACCESSORS
See also Verilog::Netlist::Subclass for additional accessors and methods.
$self->comment
Returns any comments following the definition. keep_comments=>1 must be passed to Verilog::Netlist::new for comments to be retained.
$self->delete
Delete the cell from the module it's under.
$self->gateprim
True if the cell is a gate primitive instantiation (buf/cmos/etc), but not a UDP.
$self->module
Pointer to the module the cell is in.
$self->name
The instantiation name of the cell.
$self->netlist
Reference to the Verilog::Netlist the cell is under.
$self->pins
List of Verilog::Netlist::Pin connections for the cell.
$self->pins_sorted
List of name sorted Verilog::Netlist::Pin connections for the cell.
$self->submod
Reference to the Verilog::Netlist::Module the cell instantiates. Only valid after the design is linked.
$self->submodname
The module name the cell instantiates (under the cell).
MEMBER FUNCTIONS
See also Verilog::Netlist::Subclass for additional accessors and methods.
$self->lint
Checks the cell for errors. Normally called by Verilog::Netlist::lint.
$self->new_pin
Creates a new Verilog::Netlist::Pin connection for this cell.
$self->pins_sorted
Returns all Verilog::Netlist::Pin connections for this cell.
$self->dump
Prints debugging information for this cell.
DISTRIBUTION
Verilog-Perl is part of the <http://www.veripool.org/> free Verilog EDA software tool suite. The latest version is available from CPAN and
from http://www.veripool.org/verilog-perl <http://www.veripool.org/verilog-perl>.
Copyright 2000-2012 by Wilson Snyder. This package is free software; you can redistribute it and/or modify it under the terms of either
the GNU Lesser General Public License Version 3 or the Perl Artistic License Version 2.0.
AUTHORS
Wilson Snyder <wsnyder@wsnyder.org>
SEE ALSO
Verilog-Perl, Verilog::Netlist::Subclass Verilog::Netlist
perl v5.14.2 2012-05-04 Netlist::Cell(3pm)