Makefile includes and shell environment during compile


 
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# 1  
Old 10-27-2010
Makefile includes and shell environment during compile

Below is the top of my Makefile. On one machine, I have mysql_config5, and another, I have mysql_config. In my .bashrc file of one UNIX machine, I added an alias so that that mysql_config5 is mysql_config, however, when I do make, it doesn't use that environment and I get compile errors, unless I manually change the makefile.

Code:
CC              := g++
INCLUDES        := ${shell mysql_config --include}
LIBS            := ${shell mysql_config --libs}
DEBUG           := -ggdb3 -Wall

How do I know which shell Make is using? And how can I control the environment variables/commands?

I also apologize if this post belongs in the shell part of the forum, but its relevant to compiling C++ so I thought its also good to post here.
# 2  
Old 10-27-2010
I suppose it generated -I and -L -lxxx -lyyy, but usually you can just put them in the Makefile as assignments or make includes. You might generate the variable setup with a make include, and then just reference the make variables.

The cc can make an include dependency lists using -I.

ldd can tell you where the -L dirs are, although if dynamic libs are used, there is usually an environment variable for all the necessary directories, so you need just -l's.
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