07-05-2005
Here is one sample makefile for your purpose
# Sample Makefile
SHELL=/bin/sh
.KEEP_STATE:
# Include .cpp in suffixes list
.SUFFIXES:$(.SUFFIXES) .cpp
# Rule for .cpp to .o
.cpp.o:
${COMPILE.cc} -o $@ $<
SOURCE_PATH=${HOME}/source
INCLUDE_PATH=-I.
OBJECTS = ${SOURCE_PATH}/a.o
TARGET=a.out
CPPFLAGS=${INCLUDE_PATH}-mt
all : ${TARGET}
${TARGET}: ${OBJECTS}
$(CCC) -o ${TARGET} ${OBJECTS}
clean:
$(RM) ${TARGET} ${OBJECTS}
In case the source files and Header files are present in other directories, then modify the paths pointed by variables INCLUDE_PATH and SOURCE_PATH respectively..
I hope I am clear with the description.
Note: Kindly see the bolded commands starting with spaces. These are not the spaces but Tab.
Last edited by amit_sapre; 07-05-2005 at 11:04 AM..
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LEARN ABOUT DEBIAN
gccmakedep
gccmakedep(1) General Commands Manual gccmakedep(1)
NAME
gccmakedep - create dependencies in makefiles using 'gcc -M'
SYNOPSIS
gccmakedep [ -sseparator ] [ -fmakefile ] [ -a ] [ -- options -- ] sourcefile ...
DESCRIPTION
The gccmakedep program calls 'gcc -M' to output makefile rules describing the dependencies of each sourcefile, so that make(1) knows which
object files must be recompiled when a dependency has changed.
By default, gccmakedep places its output in the file named makefile if it exists, otherwise Makefile. An alternate makefile may be speci-
fied with the -f option. It first searches the makefile for a line beginning with
# DO NOT DELETE
or one provided with the -s option, as a delimiter for the dependency output. If it finds it, it will delete everything following this up
to the end of the makefile and put the output after this line. If it doesn't find it, the program will append the string to the makefile
and place the output after that.
EXAMPLE
Normally, gccmakedep will be used in a makefile target so that typing 'make depend' will bring the dependencies up to date for the make-
file. For example,
SRCS = file1.c file2.c ...
CFLAGS = -O -DHACK -I../foobar -xyz
depend:
gccmakedep -- $(CFLAGS) -- $(SRCS)
OPTIONS
The program will ignore any option that it does not understand, so you may use the same arguments that you would for gcc(1), including -D
and -U options to define and undefine symbols and -I to set the include path.
-a Append the dependencies to the file instead of replacing existing dependencies.
-fmakefile
Filename. This allows you to specify an alternate makefile in which gccmakedep can place its output. Specifying "-" as the file
name (that is, -f-) sends the output to standard output instead of modifying an existing file.
-sstring
Starting string delimiter. This option permits you to specify a different string for gccmakedep to look for in the makefile. The
default is "# DO NOT DELETE".
-- options --
If gccmakedep encounters a double hyphen (--) in the argument list, then any unrecognized arguments following it will be silently
ignored. A second double hyphen terminates this special treatment. In this way, gccmakedep can be made to safely ignore esoteric
compiler arguments that might normally be found in a CFLAGS make macro (see the EXAMPLE section above). -D, -I, and -U options
appearing between the pair of double hyphens are still processed normally.
SEE ALSO
gcc(1), make(1), makedepend(1).
AUTHOR
The version of the gccmakedep included in this X.Org Foundation release was originally written by the XFree86 Project based on code sup-
plied by Hongjiu Lu.
Colin Watson wrote this manual page, originally for the Debian Project, based partly on the manual page for makedepend(1).
X Version 11 gccmakedep 1.0.2 gccmakedep(1)