I have attached the source files we need to use to create a Makefile. The purpose is to create a makefile that if a change is made to any of the source files, the project can be rebuilt by typing make at the command line.
Any help would be appreciated to complete this. I have been struggling with this.
I have concatenated 2 makefiles, to produce 1 however it is not running all of the code, producing a fatal error: symbol referencing errors. No output written. Can anybody please help? (4 Replies)
Hi,
I am trying to install Gandalf, a computer vision and numerical library (http://gandalf-library.sourceforge.net/). I am using Cygwin on a Windows machine and have tried everything to get this to build, but to no avail.
Gcc, make, and libtool are all included in my Cygwin install. I... (1 Reply)
I need to develop a makefile that spans across directories. For example, let's say i have an upper level directory (main) and about 2 subdirectories. I want my .cpp files and .o files to be in one subdirectory. I want my .a files to be in the other subdirectory. The .a files are made up of the... (0 Replies)
for example in my make file im building path from env variables and string but need to see what is did
what is the best way to print the result?
say I have in my Makefile :
exec_prefix = $(RUN_ENV_LOCAL)/apache
and I will like to print the exec_prefix value , how can it be done ? (1 Reply)
This query is regarding the makefiles of linux kernel modules.
I saw at some sites on net it is suggesting to include the following path:
KERNEL_SOURCE := /usr/src/linux...
while at some places it is askibg to include /lib/modules path:
KERNEL_SOURCE := /lib/modules/2.6.27-7-generic/build... (0 Replies)
I have several programs in several directories and want to use make to build the executables. What I have done is to put the main programs in their own directory together with a makefile to build the program. Then I am thinking of having another makefile residing in the directory above so I can run... (1 Reply)
I have a make file and want to write some information and am doing
@echo " RAYPK_LIBSRC = $(RAYPK_LIBSRC)"
The line of code produces
RAYPK_LIBSRC = ./source/library/raypk/time.f ./source/library/raypk/model.f ./source/library/raypk/tomo.f ./source/library/raypk/plt.f... (1 Reply)
I have several makefiles to build various programs in a software suite (currently 4 programs). I want to create a main Makefile so that I can build everything I need.
Unsure on the way I should proceed, for example using
include fdtc.mk
or calling
$(MAKE) -f ./mk/Makefile nfdtc
Here... (15 Replies)
Hi All,
I was going through some makefiles where I saw occurrences of explib_subdirs and expinc_subdirs, which I could not understand.
Exporting libs to subdirs ? Exporting include files to specified subdirs ? When do we need to do that ?
What I could understand is, for a build, I would... (4 Replies)
Discussion started by: alltaken
4 Replies
LEARN ABOUT DEBIAN
ccmakedep
ccmakedep(1) General Commands Manual ccmakedep(1)NAME
ccmakedep - create dependencies in makefiles using a C compiler
SYNOPSIS
ccmakedep [ cpp-flags ] [ -wwidth ] [ -smagic-string ] [ -fmakefile ] [ -oobject-suffix ] [ -v ] [ -a ] [ -cccompiler ] [ -- options -- ]
sourcefile ...
DESCRIPTION
The ccmakedep program calls a C compiler to preprocess each sourcefile, and uses the output to construct makefile rules describing their
dependencies. These rules instruct make(1) on which object files must be recompiled when a dependency has changed.
By default, ccmakedep places its output in the file named makefile if it exists, otherwise Makefile. An alternate makefile may be speci-
fied with the -f option. It first searches the makefile for a line beginning with
# DO NOT DELETE
or one provided with the -s option, as a delimiter for the dependency output. If it finds it, it will delete everything following this up
to the end of the makefile and put the output after this line. If it doesn't find it, the program will append the string to the makefile
and place the output after that.
EXAMPLE
Normally, ccmakedep will be used in a makefile target so that typing 'make depend' will bring the dependencies up to date for the makefile.
For example,
SRCS = file1.c file2.c ...
CFLAGS = -O -DHACK -I../foobar -xyz
depend:
ccmakedep -- $(CFLAGS) -- $(SRCS)
OPTIONS
The program will ignore any option that it does not understand, so you may use the same arguments that you would for cc(1), including -D
and -U options to define and undefine symbols and -I to set the include path.
-a Append the dependencies to the file instead of replacing existing dependencies.
-cccompiler
Use this compiler to generate dependencies.
-fmakefile
Filename. This allows you to specify an alternate makefile in which ccmakedep can place its output. Specifying "-" as the file
name (that is, -f-) sends the output to standard output instead of modifying an existing file.
-sstring
Starting string delimiter. This option permits you to specify a different string for ccmakedep to look for in the makefile. The
default is "# DO NOT DELETE".
-v Be verbose: display the C compiler command before running it.
-- options --
If ccmakedep encounters a double hyphen (--) in the argument list, then any unrecognized arguments following it will be silently
ignored. A second double hyphen terminates this special treatment. In this way, ccmakedep can be made to safely ignore esoteric
compiler arguments that might normally be found in a CFLAGS make macro (see the EXAMPLE section above). -D, -I, and -U options
appearing between the pair of double hyphens are still processed normally.
SEE ALSO cc(1), make(1), makedepend(1), ccmakedep(1).
AUTHOR
ccmakedep was written by the X Consortium.
Colin Watson wrote this manual page, originally for the Debian Project, based partly on the manual page for makedepend(1).
X Version 11 imake 1.0.5 ccmakedep(1)