09-23-2013
Quote:
Originally Posted by
alister
That's a great solution, if solaris' find supports it. Even if it does support -size, it may not support the 'M' modifier. It may require specifying in bytes followed by 'c'.
The 'M' modifier isn't POSIX indeed. That would then be be
-size +2147483648c or
-size +4194304.
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LEARN ABOUT CENTOS
libpfm_intel_x86_arch
LIBPFM(3) Linux Programmer's Manual LIBPFM(3)
NAME
libpfm_intel_x86_arch - support for Intel X86 architectural PMU
SYNOPSIS
#include <perfmon/pfmlib.h>
PMU name: ix86arch
PMU desc: Intel X86 architectural PMU
DESCRIPTION
The library supports any processor implementing the Intel architectural PMU. This is a minimal PMU with a variable number of counters but
predefined set of events. It is implemented in all recent processors starting with Intel Core Duo/Core Solo.
It acts as a default PMU support in case the library is run on a very recent processor for which the specific support has not yet been
implemented.
MODIFIERS
The following modifiers are supported on Intel architectural PMU:
u Measure at user level which includes privilege levels 1, 2, 3. This corresponds to PFM_PLM3. This is a boolean modifier.
k Measure at kernel level which includes privilege level 0. This corresponds to PFM_PLM0. This is a boolean modifier.
i Invert the meaning of the event. The counter will now count cycles in which the event is not occurring. This is a boolean modifier
e Enable edge detection, i.e., count only when there is a state transition. This is a boolean modifier.
c Set the counter mask value. The mask acts as a threshold. The counter will count the number of cycles in which the number of occur-
rences of the event is greater or equal to the threshold. This is an integer modifier with values in the range [0:255].
t Measure on both threads at the same time assuming hyper-threading is enabled. This modifier requires at least version 3 of the
architectural PMU. This is a boolean modifier.
AUTHORS
Stephane Eranian <eranian@gmail.com>
September, 2009 LIBPFM(3)