06-18-2013
Weblogic Port redirection from 7001 to 7002
Hi,
I have my WebLogic server up and running on port 7002, and can be accessed from :
https://mydomain.com:7002/App1
i want to configure Port redirection from 7001 to 7002
if users Login to
http://mydomain.com:7001/App1 it should automatically take them to
https://mydomain.com:7002/App1,
is there a way i can do port direction from 7001 to 7002 from Weblogic config side?
Appreciate your suggestions
Thanks
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LEARN ABOUT DEBIAN
verilog::netlist::port
Netlist::Port(3pm) User Contributed Perl Documentation Netlist::Port(3pm)
NAME
Verilog::Netlist::Port - Port for a Verilog Module
SYNOPSIS
use Verilog::Netlist;
...
my $port = $module->find_port ('pinname');
print $port->name;
DESCRIPTION
A Verilog::Netlist::Port object is created by Verilog::Netlist::Module for every port connection in the module.
ACCESSORS
See also Verilog::Netlist::Subclass for additional accessors and methods.
$self->array
Any array declaration for the port. This only applies to Verilog 1995 style ports which can declare port bits independently from the
signal declarations. When using Verilog 2001 style ports, see the matching net declaration's lsb and msb methods instead, for example
"$module-"find_net($port->name)->msb>.
$self->comment
Returns any comments following the definition. keep_comments=>1 must be passed to Verilog::Netlist::new for comments to be retained.
$self->data_type
The SystemVerilog data type of the port.
$self->direction
The direction of the port: "in", "out", or "inout".
$self->module
Reference to the Verilog::Netlist::Module the port is in.
$self->name
The name of the port.
$self->net
Reference to the Verilog::Netlist::Net the port connects to. Only valid after the netlist is linked.
$self->type
Approximately an alias of data_type for backward compatibility. Do not use for new applications.
MEMBER FUNCTIONS
See also Verilog::Netlist::Subclass for additional accessors and methods.
$self->dump
Prints debugging information for this port.
DISTRIBUTION
Verilog-Perl is part of the <http://www.veripool.org/> free Verilog EDA software tool suite. The latest version is available from CPAN and
from http://www.veripool.org/verilog-perl <http://www.veripool.org/verilog-perl>.
Copyright 2000-2012 by Wilson Snyder. This package is free software; you can redistribute it and/or modify it under the terms of either
the GNU Lesser General Public License Version 3 or the Perl Artistic License Version 2.0.
AUTHORS
Wilson Snyder <wsnyder@wsnyder.org>
SEE ALSO
Verilog-Perl, Verilog::Netlist::Subclass Verilog::Netlist
perl v5.14.2 2012-05-04 Netlist::Port(3pm)