According to the diagnostics:
line 49 in fd.f is trying to include a file named fd.par. Either fd.f is expecting this file to be somewhere other than ../library/fd/fd.par or ../library/fd/fd.par has permissions set such that the person running make doesn't have read access.
Hi,
I have a makefile which looks like this
ProcessA :
commands
touch pro1
ProcessB : pro1
commands
touch pro2
ProcessC: pro3
commands
and after some runs, i wish only pro3 to run and I check that "pro1" and "pro2" are there in the directory, but still, if i give make... (3 Replies)
Hi, I am very new with makefile topics , maybe this is a very symple question...
I have this code wich compile very good ( I get it from the net), I will call it code A.
I have to add it with a program that is all ready in use, (code B) that also compile good. When I put together it doesnt... (7 Replies)
Hi, I'm trying to run the module load command in a Makefile and i'm getting the following error:
make: module: command not found
Why is this? Is there any way to run this command in a Makefile?
NOTE: command - module load msjava/sunjdk/1.5.0 works fine outside of the Makefile (2 Replies)
I need to create an executable with these two makefiles(they both have libaries i
need(qt and ruby))
i have extconf.rb
gui.ui
gui_include.h
main.cpp
ScaleIM_client.rb
ui_gui.h
i want to combine them all into one executable
please!... (2 Replies)
Hi,
Here is my makefile http://pastie.org/1104332. I am trying to compile different .c files and .s files (assembly files) from different sub directories into E:/em35x/build/mfg-sample-app-cortexm3-iar-em357-em3xx-dev0680/ then the linker should link all the .o files from the build directory... (1 Reply)
I had created a Makefile for my project. my project file hierarchy is like this:
1. a source folder with main.c and Makefile in it
2. and a top level Makefile
here is the Makefile in src folder
all: program
program: main.c
gcc -o program main.c
clean:
rm programand here is top... (3 Replies)
hello, I'm trying to create a makefile to run multiple c files. I am able to run one c file only with the code I have when I tried to run 2 or more c files I'm not able. here is my code
# $Source: /home/hectormasencio/make/Makefile,v $
# $Date: 2012/11/27 11:35:30 $
CC= gcc
OBJS= temp.o... (3 Replies)
Hi there! I am a undergraduate student and recently submitted an assignment for my coursework - however there was one function I could not get to work properly before the due date. Although I don't need to complete this work anymore I would still like to in order to know what was going wrong. If... (11 Replies)
Discussion started by: cherryTango
11 Replies
LEARN ABOUT CENTOS
gccmakedep
gccmakedep(1) General Commands Manual gccmakedep(1)NAME
gccmakedep - create dependencies in makefiles using 'gcc -M'
SYNOPSIS
gccmakedep [ -sseparator ] [ -fmakefile ] [ -a ] [ -- options -- ] sourcefile ...
DESCRIPTION
The gccmakedep program calls 'gcc -M' to output makefile rules describing the dependencies of each sourcefile, so that make(1) knows which
object files must be recompiled when a dependency has changed.
By default, gccmakedep places its output in the file named makefile if it exists, otherwise Makefile. An alternate makefile may be speci-
fied with the -f option. It first searches the makefile for a line beginning with
# DO NOT DELETE
or one provided with the -s option, as a delimiter for the dependency output. If it finds it, it will delete everything following this up
to the end of the makefile and put the output after this line. If it doesn't find it, the program will append the string to the makefile
and place the output after that.
EXAMPLE
Normally, gccmakedep will be used in a makefile target so that typing 'make depend' will bring the dependencies up to date for the make-
file. For example,
SRCS = file1.c file2.c ...
CFLAGS = -O -DHACK -I../foobar -xyz
depend:
gccmakedep -- $(CFLAGS) -- $(SRCS)
OPTIONS
The program will ignore any option that it does not understand, so you may use the same arguments that you would for gcc(1), including -D
and -U options to define and undefine symbols and -I to set the include path.
-a Append the dependencies to the file instead of replacing existing dependencies.
-fmakefile
Filename. This allows you to specify an alternate makefile in which gccmakedep can place its output. Specifying "-" as the file
name (that is, -f-) sends the output to standard output instead of modifying an existing file.
-sstring
Starting string delimiter. This option permits you to specify a different string for gccmakedep to look for in the makefile. The
default is "# DO NOT DELETE".
-- options --
If gccmakedep encounters a double hyphen (--) in the argument list, then any unrecognized arguments following it will be silently
ignored. A second double hyphen terminates this special treatment. In this way, gccmakedep can be made to safely ignore esoteric
compiler arguments that might normally be found in a CFLAGS make macro (see the EXAMPLE section above). -D, -I, and -U options
appearing between the pair of double hyphens are still processed normally.
SEE ALSO gcc(1), make(1), makedepend(1).
AUTHOR
The version of the gccmakedep included in this X.Org Foundation release was originally written by the XFree86 Project based on code sup-
plied by Hongjiu Lu.
Colin Watson wrote this manual page, originally for the Debian Project, based partly on the manual page for makedepend(1).
X Version 11 gccmakedep 1.0.2 gccmakedep(1)