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Full Discussion: Apache instance
Operating Systems Linux Red Hat Apache instance Post 302355552 by Kandra on Wednesday 23rd of September 2009 03:46:17 AM
Old 09-23-2009
This is akin to asking "how many boxes can I transport on a boat".

It all depends on a lot of factors. What kind of boxes are they? How big are they? What kind of boat are you using to transport the boxes? There's also a question of where your limitations are. For instance, if the boxes are very light, volume is obviously going to be the limiting factor. If they are excessively heavy, then weight might be the issue.

In regards to your question, the same answer applies. What kind of Apache instances are they? If they are low-RAM but CPU heavy processes, then obviously CPU will be your limiting factor. If they eat up a lot of RAM, but little CPU, then RAM is your limit. The same thing goes for I/O.

It's also a question of your architecture. For instance, Apache2 with prefork has a hard limit of ~64k processes, so you can never go beyond that, not that you're likely to reach that figure in any reasonable scenario anyway. Threaded Apache2 doesn't have the same kind of limits, but have limits of their own.

It's also a matter of how you set up Apache. I've seen systems where the limiting factor was neither CPU nor RAM, but the fact that Apache had to spend all its time spawning new processes.

The simple answer to your question is the following, how much RAM does each process consume, and how much RAM do you have available?

For instance, if each process takes 50MB RAM and you have 2GB RAM, you can run 40 processes.

Now, again, this is NOT a simple question to answer, and the only way for you to reliably find out is to take a look at YOUR setup and do some calculation work.
 

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CZ(4)							   BSD Kernel Interfaces Manual 						     CZ(4)

NAME
cz -- Cyclades-Z series multi-port serial adapter device driver SYNOPSIS
cz* at pci? dev ? function ? DESCRIPTION
The cz device driver supports the Cyclades-Z series of multi-port serial adapters. The Cyclades-Z is an intelligent serial controller com- prising: o PLX9060ES PCI bus interface o Xilinx XC5204 FPGA o IDT R3052 MIPS CPU The MIPS CPU runs firmware provided by the device driver. Communication with the MIPS is performed by modifying data structures located in board local RAM or host RAM. The Cyclades-Z comes in three basic flavors: o Cyclades-8Zo rev. 1 -- This is an older 8-port board with no FPGA. The serial ports are provided by an octopus cable. o Cyclades-8Zo rev. 2 -- This is the newer 8-port board. The serial ports are provided by an octopus cable. o Cyclades-Ze -- This is the expandable version of the Cyclades-Z. It uses an HD-50 SCSI cable to connect the board to a 1U rack mountable serial expansion box. Each box has 16 RJ45 serial ports, and up to 4 boxes may be chained together, for a total of 64 ports. Boxes 3 and 4 require their own external power supply, otherwise the firmware will refuse to start (as it cannot communi- cate with the UARTs in those boxes). The Cyclades-Z has several features to improve performance under high serial I/O load: o The board may operate in interrupt-driven mode or polled mode to reduce interrupt load. o Each channel has a large input and output buffer. o Each channel may be programmed to generate an interrupt based on reception of a specific character, e.g. a PPP End-Of-Frame charac- ter. o The MIPS CPU on the board performs all flow-control handling. FILES
/dev/ttyCZnnnn -- dial-in (normal) TTY device /dev/dtyCZnnnn -- dial-out TTY device SEE ALSO
pci(4), termios(4), tty(4) HISTORY
The cz driver first appeared in NetBSD 1.5. AUTHORS
The cz driver was written by Jason R. Thorpe <thorpej@zembu.com> and Bill Studenmund <wrstuden@zembu.com> of Zembu Labs, Inc. BUGS
The cz driver does not currently implement communication via host RAM. While this may improve performance by reducing the number of PCI mem- ory space read/write cycles, it is not straightforward to implement with the current bus_dma(9) API. Interrupt mode has not been tested. There is no support for reading or writing the EEPROM connected to the PLX PCI bus controller. BSD
May 17, 2000 BSD
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