about make file


 
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# 1  
Old 06-30-2005
Network about make file

when u run the make file,what the make fill will call Smilie
# 2  
Old 06-30-2005
I am not sure what the question intends.

I will reply to this interpretation of your question.

When you run make, what makefile will it run ?

From man make we have

If no -f option is present, make will look for the makefiles GNUmakefile, makefile, and Makefile, in that order.

If your make file has a name different from one of these names say unix.mak, then you need to call the make as

Code:
make -f unix.mak

# 3  
Old 06-30-2005
Network

Quote:
Originally Posted by vino
I am not sure what the question intends.

I will reply to this interpretation of your question.

When you run make, what makefile will it run ?

From man make we have

If no -f option is present, make will look for the makefiles GNUmakefile, makefile, and Makefile, in that order.

If your make file has a name different from one of these names say unix.mak, then you need to call the make as

Code:
make -f unix.mak


thanks vino, my question is

when u simply give the below command

make

it will run the Makefile,and content of the make file. How the particular Makefile is invoked by make command,

if u have a only sample.cpp file,

just give the command

make sample

it will generate sample.exe file
without creating any Makefile,and without writing any content into the make file, how the sample.exe file is created

hope u got the question????
# 4  
Old 06-30-2005
kumar,

There still exists patches in your post, where I cant understand what you want to say.

Code:
How the particular Makefile is invoked by make command, if u have a
only sample.cpp file, just give the command
make sample
it will generate sample.exe file without creating any Makefile,and without 
writing any content into the make file, how the sample.exe file is 
created

I understand that you want to know how the make works.

Check out this.

http://www.gnu.org/software/make/man...ke_2.html#SEC5


In your make file, you will have a target which make tries to achieve.

In your makefile, you must(possibly) be having

Code:
sample: sample
       gcc sample.cpp -o sample

When you say make sample make will try make this particular target.

That is why in a single target makefile, you can give make Makefile or make targetname and still have the same result.

-vino
# 5  
Old 06-30-2005
I too am unable to determine your question. But maybe this will help. If you use:
make
the make program will look for a makefile as described above. When it find one, it will scan the first looking for the first target. Then it will make that first target.

If you use "make sample" and there is no makefile to be found, make will use only it's internal rules and attempt to proceed. If, for example, it finds a sample.c, it will attempt to compile it. make is of very limited use without a makefile. If both a sample.f and a sample.c exist, which way make goes depends on the order of the internal rules.
 
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