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Search: Posts Made By: teddy6507
2,696
Posted By teddy6507
Hi Chubler_XL it is in opus schematic by...
Hi Chubler_XL
it is in opus schematic by Cadence

essentially , what i want to do is find out total metal tracks being used in the design and measure length and width of each metal tracks . metal...
2,696
Posted By teddy6507
Tcl - how to report out metal layer usage in a design and measure its width and length?
Hi guys,
I am very new to tcl here. would like to request some help please

let say i have a design .it's a IC design .
I would like to know each usage of metal layer of that design and also...
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