If $ is inside makfile, it is considered as internal definition of makefile.
Is there any way around this?
I mean I want to print $ using makefile.
Any tip will be great help !
Not sure if I understand what you are trying to do without seeing sample program code, but putting a character inside double-quotes normally protects it from being interpreted. For instance
command.
Inside the makefile,
I want to change values of MUCOEFF in file with above makefile.
0.0 MUCOEFF -> 0.1 MUCOEFF
If I type "awk '/MUCOEFF/{$1=0.1}1' file > file" in command line, it works.
But if I type "make test" which calls the above code, it gives following error message :
As you see from the first line in error message, $1 is not recognized and gives syntax error.
Main reason is that $ is recognized as internal definition of makefile.
I tried "$"1 and "$1", but it does not work also.
It is recognized as "awk '/MUCOEFF/{"1=0.1}1' file > file" or "awk '/MUCOEFF/{"=0.1}1' file > file".
Any other ways?
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