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make file - linking

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# 1  
Old 05-25-2007
make file - linking
Hi,

I have written a makefile and am facing some problem in linking..
This is the first makefile i write.. i think that am just compiling all the .c files and not linking the object files.. can anybody tell me how to link all the .o files???


When i do make all i am getting the following error:

/usr/bin/gcc -c -g -O2 -ansi -Wall -D_REENTRANT -D_POSIX_C_SOURCE=199309L -I./inc src -o all
gcc: src: linker input file unused because linking not done


Code:
CROSS_COMPILE   = /usr/bin/

AS      = $(CROSS_COMPILE)as
AR      = $(CROSS_COMPILE)ar
LD      = $(CROSS_COMPILE)ld
CC      = $(CROSS_COMPILE)gcc

PRINT   = /bin/echo

SRCS    = $(wildcard *.c)
OBJS    = $(SRCS:%.c=%.o)
BASEDIR = $(HOME)/Projects_latest
TOPDIR = $(BASEDIR)/voip/ip_phone/source/sys_test/app/hs1x0/hs110/inc
#Subdirectories of source code

SUBDIR = ./src
.PHONY: clean

VPATH = ./inc
CFLAGS = -c -g -O2 -ansi -Wall -D_REENTRANT -POSIX_C_SOURCE=199309L

CFLAGS += $(patsubst %, -I% , $(VPATH))

all: $(addsuffix $(SRCS) , $(SUBDIR))
        $(CC) $(CFLAGS) $< -o $@

# 2  
Old 05-26-2007
gcc -c means "do not link, create an object file instead" (a .o output file named like: file.o)
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