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# 1  
Old 02-17-2011
Noob makefile problem
Im trying to build a makefile for the first time in many years and Im coming to a screaching halt on something that should be child's play; just compiling two files. Here is an excerpt of the make file.
(using GMAKE on a TI compiler)

Code:
CCHP        = <<compiler>>

PROJ_DIR     = .
APP_DIR        = ../
OBJ_DIR        = ./Debug

INC_DIR        = -i"$(APP_DIR)common/inc"

CCFLAGS     = <<compiler options>>

###########################################################
# Common files
###########################################################

$(OBJ_DIR)/file1.obj : ../common/src/file1.c
    @echo compiling 
    $(CCHP) $(CCFLAGS) ../common/src/file1.c    

$(OBJ_DIR)/file2.obj : ../common/src/file2.c
    @echo compiling 
    $(CCHP) $(CCFLAGS) ../common/src/file2.c

When I call this makefile (make -fmake.mak) it only compiles the file listed first. I can move file2 first then it will compile only that one and ignore the second. Both files do compile as I can enter an IF/ELSE around the two and pass the appropriate variable to the make. I also ran the make in debug -d and it also only reports information on the first file listed here. What gives? Some stupid syntatical error? Idiot user error?
# 2  
Old 02-17-2011
Try this?

Code:
CCHP        = <<compiler>>

PROJ_DIR     = .
APP_DIR        = ../
OBJ_DIR        = ./Debug

INC_DIR        = -i"$(APP_DIR)common/inc"

CCFLAGS     = <<compiler options>>

###########################################################
# Common files
###########################################################

All:      $(OBJ_DIR)/file1.obj $(OBJ_DIR)/file2.obj

$(OBJ_DIR)/file1.obj : ../common/src/file1.c
    @echo compiling 
    $(CCHP) $(CCFLAGS) ../common/src/file1.c    

$(OBJ_DIR)/file2.obj : ../common/src/file2.c
    @echo compiling 
    $(CCHP) $(CCFLAGS) ../common/src/file2.c

I couldn't insert a tab in there so you will have to modify the line when you try it.

Andrew
# 3  
Old 02-18-2011
Thanks for the reply. Turns out it was a user related problem. I was not aware that the first rule was the overall target of the make, so once the first object file was compiled it had no reason to do the other file. I did something similar to what you proposed and it worked fine.
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