Programming

If I have a makefile that looks like this:

Code:

regress = NO

echo_set_regress: regress = YES
echo_set_regress: echo_regress
    @echo $(regress)

echo_regress:
    @echo $(regress)
ifeq ($(regress), NO)
    @echo "regress == NO"
else
    @echo "regress == YES"
endif

When I run make echo_regress I get this output:

NO
regress == NO

When I run make_set_regress, I get this output:

YES
regress == NO
YES

Notice that the ifeq check doesn't seem to work at all as I'm still getting regress == NO output. What am I doing wrong? Any help appreciated.

Makefiles do not work that way, they are not shell scripts. They are a list of what files you need to build what files. if you tell it b comes from a, c comes from b, and d comes from c, give it a, then ask for d, it will execute the given instructions in the order needed to produce the target. You can specify them in any order.

Targets you build do not affect variables. These control structures you're trying are more like #ifdef's in C, if you know how those work.

A statement like

Code:

a:b
        echo "creating file a"
        cp b a

...specifies files and only files. It specifies that to create file a, you must have file b. You cannot use it to assign a variable -- and that's probably a good thing since that would botch horribly if make tried to do things in parallel. The lines below it, which must begin in tabs, are shell statements that specify how to create file a. They are executed individually and in order when make tries to build target 'a'.

Remember, you can specify these relationships in any order, and the makefile will decide what statements it needs to do in order to create a from b, c from a, d from c, and so forth. This means it must read and parse the entire file before doing anything, it is not a shell script. It won't even have started building by the time it reaches @echo "regress == YES" because it parses the entire file before deciding what targets to build in what order, and statements in them cannot affect the make environment anyway since they are executed in a shell.

Actually, you can specify a variable for a specific target.

GNU `make'

What I'm trying to figure out is why the variable that is set for the specific target is echoed correctly, but doesn't seem to be tested correctly.