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getisax(2) [sunos man page]

getisax(2)							   System Calls 							getisax(2)

getisax - extract valid instruction set extensions SYNOPSIS
#include <sys/auxv.h> uint_t getisax(uint32_t *array, uint_t n); DESCRIPTION
The getisax() function sets the vector array of n 32-bit integers to contain the bits from the AV_xxx_yyy namespace of the given instruc- tion set architecture. Values for AV_xxx_yyy are as follows: SPARC AV_SPARC_MUL32 32x32-bit smul/umul is efficient AV_SPARC_DIV32 32x32-bit sdiv/udiv is efficient AV_SPARC_FSMULD fsmuld instruction is efficient AV_SPARC_V8PLUS V9 instructions available to 32-bit apps AV_SPARC_POPC popc instruction is efficient AV_SPARC_VIS VIS instruction set is supported AV_SPARC_VIS2 IS2 instruction set is supported x86 AV_386_FPU x87-style floating point AV_386_TSC rdtsc instruction AV_386_CX8 cmpxchg8b instruction AV_386_SEP sysenter and sysexit AV_386_AMD_SYSC AMD's syscall and sysret AV_386_CMOV conditional move instructions AV_386_MMX MMX instructions AV_386_AMD_MMX AMD's MMX instructions AV_386_AMD_3DNow AMD's 3Dnow! instructions AV_386_AMD_3DNowx AMD's 3Dnow! extended instructions AV_386_FXSR fxsave and fxrstor AV_386_SSE SSE instructions and regs AV_386_SSE2 SSE2 instructions and regs AV_386_PAUSE use pause instruction (in spin loops) AV_386_SSE3 SSE3 instructions and regs AV_386_MON monitor/mwait instructions RETURN VALUES
The getisax() function returns the number of array elements that contain non-zero values. EXAMPLES
Example 1: Use getisax() to determine if the SSE2 instruction set is present. In the following example, if the message is written, the SSE2 instruction set is present and fully supportred by the operating system. uint_t ui; (void) getisax(&ui, 1); if (ui & AV_386_SSE2) printf("SSE2 instruction set extension is present. "); ATTRIBUTES
See attributes(5) for descriptions of the following attributes: +-----------------------------+-----------------------------+ | ATTRIBUTE TYPE | ATTRIBUTE VALUE | +-----------------------------+-----------------------------+ |Interface Stability |Stable | +-----------------------------+-----------------------------+ |MT-Level |Safe | +-----------------------------+-----------------------------+ SEE ALSO
isainfo(1), ld(1), pargs(1), attributes(5) Linker and Libraries Guide SPARC Assembly Language Reference Manual x86 Assembly Language Reference Manual SunOS 5.10 4 Oct 2004 getisax(2)

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sync_instruction_memory(3C)				   Standard C Library Functions 			       sync_instruction_memory(3C)

sync_instruction_memory - make modified instructions executable SYNOPSIS
void sync_instruction_memory(caddr_t addr, int len); DESCRIPTION
The sync_instruction_memory() function performs whatever steps are required to make instructions modified by a program executable. Some processor architectures, including some SPARC processors, have separate and independent instruction and data caches which are not kept consistent by hardware. For example, if the instruction cache contains an instruction from some address and the program then stores a new instruction at that address, the new instruction may not be immediately visible to the instruction fetch mechanism. Software must explicitly invalidate the instruction cache entries for new or changed mappings of pages that might contain executable instructions. The sync_instruction_memory() function performs this function, and/or any other functions needed to make modified instructions between addr and addr+len visible. A program should call sync_instruction_memory() after modifying instructions and before executing them. On processors with unified caches (one cache for both instructions and data) and pipelines which are flushed by a branch instruction, such as the x86 architecture, the function may do nothing and just return. The changes are immediately visible to the thread calling sync_instruction_memory() when the call returns, even if the thread should migrate to another processor during or after the call. The changes become visible to other threads in the same manner that stores do; that is, they eventually become visible, but the latency is implementation-dependent. The result of executing sync_instruction_memory() are unpredictable if addr through addr+len-1 are not valid for the address space of the program making the call. RETURN VALUES
No values are returned. ATTRIBUTES
See attributes(5) for descriptions of the following attributes: +-----------------------------+-----------------------------+ | ATTRIBUTE TYPE | ATTRIBUTE VALUE | +-----------------------------+-----------------------------+ |MT-Level |MT-Safe | +-----------------------------+-----------------------------+ SEE ALSO
attributes(5) SunOS 5.11 12 Feb 1997 sync_instruction_memory(3C)

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