Linux and UNIX Man Pages

Linux & Unix Commands - Search Man Pages

ddi_dma_set_sbus64(9f) [opensolaris man page]

ddi_dma_set_sbus64(9F)					   Kernel Functions for Drivers 				    ddi_dma_set_sbus64(9F)

ddi_dma_set_sbus64 - allow 64-bit transfers on SBus SYNOPSIS
#include <sys/ddi.h> #include <sys/sunddi.h> int ddi_dma_set_sbus64(ddi_dma_handle_t handle, uint_t burstsizes); INTERFACE LEVEL
Solaris DDI specific (Solaris DDI). PARAMETERS
handle The handle filled in by a call to ddi_dma_alloc_handle(9F). burstsizes The possible burst sizes the device's DMA engine can accept in 64-bit mode. DESCRIPTION
ddi_dma_set_sbus64() informs the system that the device wishes to perform 64-bit data transfers on the SBus. The driver must first allocate a DMA handle using ddi_dma_alloc_handle(9F) with a ddi_dma_attr(9S) structure describing the DMA attributes for a 32-bit transfer mode. burstsizes describes the possible burst sizes the device's DMA engine can accept in 64-bit mode. It may be distinct from the burst sizes for 32-bit mode set in the ddi_dma_attr(9S) structure. The system will activate 64-bit SBus transfers if the SBus supports them. Other- wise, the SBus will operate in 32-bit mode. After DMA resources have been allocated (see ddi_dma_addr_bind_handle(9F) or ddi_dma_buf_bind_handle(9F)), the driver should retrieve the available burst sizes by calling ddi_dma_burstsizes(9F). This function will return the burst sizes in 64-bit mode if the system was able to activate 64-bit transfers. Otherwise burst sizes will be returned in 32-bit mode. RETURN VALUES
ddi_dma_set_sbus64() returns: DDI_SUCCESS Successfully set the SBus to 64-bit mode. DDI_FAILURE 64-bit mode could not be set. CONTEXT
ddi_dma_set_sbus64() can be called from user, kernel, or interrupt context. ATTRIBUTES
See attributes(5) for descriptions of the following attributes: +-----------------------------+-----------------------------+ | ATTRIBUTE TYPE | ATTRIBUTE VALUE | +-----------------------------+-----------------------------+ |Architecture |SBus | +-----------------------------+-----------------------------+ SEE ALSO
attributes(5), ddi_dma_addr_bind_handle(9F), ddi_dma_alloc_handle(9F), ddi_dma_buf_bind_handle(9F), ddi_dma_burstsizes(9F), ddi_dma_attr(9S) NOTES
64-bit SBus mode is activated on a per SBus slot basis. If there are multiple SBus cards in one slot, they all must operate in 64-bit mode or they all must operate in 32-bit mode. SunOS 5.11 1 Jan 1997 ddi_dma_set_sbus64(9F)

Check Out this Related Man Page

ddi_dma_lim_sparc(9S)					    Data Structures for Drivers 				     ddi_dma_lim_sparc(9S)

ddi_dma_lim_sparc, ddi_dma_lim - SPARC DMA limits structure SYNOPSIS
#include <sys/ddidmareq.h> INTERFACE LEVEL
Solaris SPARC DDI specific (Solaris SPARC DDI). These interfaces are obsolete. DESCRIPTION
This page describes the SPARC version of the ddi_dma_lim structure. See ddi_dma_lim_x86(9S) for a description of the x86 version of this structure. A ddi_dma_lim structure describes in a generic fashion the possible limitations of a device's DMA engine. This information is used by the system when it attempts to set up DMA resources for a device. STRUCTURE MEMBERS
uint_t dlim_addr_lo; /* low range of 32 bit addressing capability */ uint_t dlim_addr_hi; /* inclusive upper bound of address. capability */ uint_t dlim_cntr_max; /* inclusive upper bound of dma engine address limit * / uint_t dlim_burstsizes; /* binary encoded dma burst sizes */ uint_t dlim_minxfer; /* minimum effective dma xfer size */ uint_t dlim_dmaspeed; /* average dma data rate (kb/s) */ The dlim_addr_lo and dlim_addr_hi fields specify the address range the device's DMA engine can access. The dlim_addr_lo field describes the lower 32-bit boundary of the device's DMA engine, the dlim_addr_hi describes the inclusive upper 32-bit boundary. The system allocates DMA resources in a way that the address for programming the device's DMA engine (see ddi_dma_cookie(9S) or ddi_dma_htoc(9F)) is within this range. For example, if your device can access the whole 32-bit address range, you may use [0,0xFFFFFFFF]. If your device has just a 16-bit address register but will access the top of the 32-bit address range, then [0xFFFF0000,0xFFFFFFFF] is the right limit. The dlim_cntr_max field describes an inclusive upper bound for the device's DMA engine address register. This handles a fairly common case where a portion of the address register is only a latch rather than a full register. For example, the upper 8 bits of a 32-bit address reg- ister can be a latch. This splits the address register into a portion that acts as a true address register (24 bits) for a 16 Mbyte segment and a latch (8 bits) to hold a segment number. To describe these limits, specify 0xFFFFFF in the dlim_cntr_max structure. The dlim_burstsizes field describes the possible burst sizes the device's DMA engine can accept. At the time of a DMA resource request, this element defines the possible DMA burst cycle sizes that the requester's DMA engine can handle. The format of the data is binary encod- ing of burst sizes assumed to be powers of two. That is, if a DMA engine is capable of doing 1-, 2-, 4-, and 16-byte transfers, the encod- ing ix 0x17. If the device is an SBus device and can take advantage of a 64-bit SBus, the lower 16 bits are used to specify the burst size for 32-bit transfers and the upper 16 bits are used to specify the burst size for 64-bit transfers. As the resource request is handled by the system, the burstsizes value can be modified. Prior to enabling DMA for the specific device, the driver that owns the DMA engine should check (using ddi_dma_burstsizes(9F)) what the allowed burstsizes have become and program the DMA engine appropriately. The dlim_minxfer field describes the minimum effective DMA transfer size (in units of bytes). It must be a power of two. This value speci- fies the minimum effective granularity of the DMA engine. It is distinct from dlim_burstsizes in that it describes the minimum amount of access a DMA transfer will effect. dlim_burstsizes describes in what electrical fashion the DMA engine might perform its accesses, while dlim_minxfer describes the minimum amount of memory that can be touched by the DMA transfer. As a resource request is handled by the sys- tem, the dlim_minxfer value can be modified contingent upon the presence (and use) of I/O caches and DMA write buffers in between the DMA engine and the object that DMA is being performed on. After DMA resources have been allocated, the resultant minimum transfer value can be gotten using ddi_dma_devalign(9F). The field dlim_dmaspeed is the expected average data rate for the DMA engine (in units of kilobytes per second). Note that this should not be the maximum, or peak, burst data rate, but a reasonable guess as to the average throughput. This field is entirely optional and can be left as zero. Its intended use is to provide some hints about how much of the DMA resource this device might need. ATTRIBUTES
See attributes(5) for descriptions of the following attributes: +-----------------------------+-----------------------------+ | ATTRIBUTE TYPE | ATTRIBUTE VALUE | +-----------------------------+-----------------------------+ |Interface Stability |Obsolete | +-----------------------------+-----------------------------+ SEE ALSO
ddi_dma_addr_setup(9F), ddi_dma_buf_setup(9F), ddi_dma_burstsizes(9F), ddi_dma_devalign(9F), ddi_dma_htoc(9F), ddi_dma_setup(9F), ddi_dma_cookie(9S), ddi_dma_lim_x86(9S), ddi_dma_req(9S) SunOS 5.11 12 Oct 2005 ddi_dma_lim_sparc(9S)
Man Page