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scc(4) [netbsd man page]

SCC(4)							   BSD Kernel Interfaces Manual 						    SCC(4)

scc -- Zilog 8530 Serial Communications Controller interface SYNOPSIS
scc* at ioasic? offset ? DESCRIPTION
The scc driver provides support for the Zilog 8530 Serial Communications Controller (SCC) via the IOASIC found on DECstation 5000 models in the /100, /20, and /240 series (supported by NetBSD/pmax). Each SCC device has two serial ports. The DECstation 5000 model 20 provides one SCC device. Other models provide two, but one port of each device is dedicated to mouse and keyboard input, respectively. Input and output for each line may set to one of following baud rates: 50, 75, 110, 134.5, 150, 300, 600, 1200, 1800, 2400, 4800, 9600, 19200, 38400, or 57600. Speeds up to 230400 are supported by the chip and the motherboard, but speeds higher than 57600 do not work reliably without an external clock signal. FILES
/dev/ttya /dev/ttyb /dev/ttyc /dev/ttyd The mapping from units to serial-hardware outlets is idiosyncratic. The even ports are wired serial connectors and the odd-numbered ports are reserved for mouse and keyboard. On machines with one port like Personal DECstations, the single device is ttya. On the 5000/1xx and 5000/2xx, the first serial port (default serial console) is ttyc and the second port is ttya. SEE ALSO
intro(4), ioasic(4), ttys(5), MAKEDEV(8) HISTORY
The scc driver first appeared in 4.4BSD. The scc driver was also used for the IOASIC SCC found in DEC Alpha model 3000 TurboCHANNEL based systems; NetBSD/alpha has since been con- verted to use the machine-independent zstty(4). BUGS
The IOASIC provides internal DMA channels that can be programmed to transfer up to 4096 bytes of data into, or out, of an SCC without further software intervention. This feature of the IOASIC is not yet supported. The mapping from device-special files (major and minor number) to chip and port is arguably backwards. ULTRIX tries to hide the hardware mapping, but NetBSD does not. Users wanting to use ULTRIX compatible tty names /dev/tty0 and /dev/tty1 for the scc comm-port lines should make links or device-special files which match their hardware setup. BSD
April 24, 2003 BSD

Check Out this Related Man Page

IOASIC(9)						   BSD Kernel Developer's Manual						 IOASIC(9)

IOASIC, ioasic_intr_establish, ioasic_intr_disestablish, ioasic_intr_evcnt, ioasic_attach_devs, ioasic_submatch -- baseboard I/O control ASIC for DEC TURBOchannel systems SYNOPSIS
#include <sys/bus.h> #include <dev/tc/tcvar.h> #include <dev/tc/ioasicreg.h> #include <dev/tc/ioasicvar.h> void ioasic_intr_establish(struct device *dev, void *cookie, int level, int (*handler)(void *), void *arg); void ioasic_intr_disestablish(struct device *dev, void *cookie); const struct evcnt * ioasic_intr_evcnt(struct device *dev, void *cookie); void ioasic_attach_devs(struct ioasic_softc *sc, struct ioasic_dev *ioasic_devs, int ioasic_ndevs); int ioasic_submatch(struct cfdata *match, struct ioasicdev_attach_args *ia); DESCRIPTION
The IOASIC device provides support for the DEC proprietary IOCTL ASIC found on all DEC TURBOchannel machines with MIPS (DECstation 5000 series, excluding the 5000/200) and Alpha (3000-series) systems. The IOASIC is memory-mapped into the TURBOchannel system slot to interface up to sixteen I/O devices. It connects the TURBOchannel to a 16-bit wide I/O bus and supplies various control signals to the devices that share this bus. The IOASIC provides hardware DMA channels and interrupt support. DMA transfers are between one and four 32-bit words (16 bytes) in length, depending on the device. The IOASIC stores the data in internal data registers. The data is transferred to and from the registers in 16-bit words to the device. Various interrupts are signalled on DMA pointer-related conditions. DATA TYPES
Drivers for devices attached to the IOASIC will make use of the following data types: struct ioasicdev_attach_args A structure used to inform the driver of the IOASIC device properties. It contains the following members: char iada_modname tc_offset_t iada_offset tc_addr_t iada_addr void *iada_cookie; struct ioasic_softc The parent structure which contains at the following members which are useful for drivers: bus_space_tag_t sc_bst; bus_space_handle_t sc_bsh; bus_dma_tag_t sc_dmat; struct ioasic_dev A structure describing the machine-dependent devices attached to the IOASIC containing the following members: char *iad_modname; tc_offset_t iad_offset; void *iad_cookie; uint32_t iad_intrbits; FUNCTIONS
ioasic_intr_establish(dev, cookie, level, handler, arg) Establish an interrupt handler with device dev for the interrupt described completely by cookie. The priority of the interrupt is specified by level. When the interrupt occurs the function handler is called with argument arg. ioasic_intr_disestablish(dev, cookie) Dis-establish the interrupt handler with device dev for the interrupt described complete ly cookie. ioasic_intr_evcnt(dev, cookie) Do interrupt event counting with device dev for the event described completely by cookie. ioasic_attach_devs(sc, ioasic_devs, ioasic_ndevs) Configure each of the ioasic_ndevs devices in ioasic_devs. ioasic_submatch(match, ia) Check that the device offset is not OASIC_OFFSET_UNKNOWN. The ioasic_intr_establish(), ioasic_intr_disestablish(), and ioasic_intr_evcnt() functions are likely to used by all IOASIC device drivers. The ioasic_attach_devs() function is used by ioasic driver internally and is of interest to driver writers because it must be aware of your device for it to be found during autoconfiguration. AUTOCONFIGURATION
The IOASIC is a direct-connection bus. During autoconfiguration, machine-dependent code will provide an array of struct ioasic_devs describ- ing devices attached to the IOASIC to be used by the ioasic driver. The ioasic driver will pass this array to ioasic_attach_devs() to attach the drivers with the devices. Drivers match the device using iada_modname. During attach, all drivers should use the parent's bus_space and bus_dma resources, and map the appropriate bus_space region using bus_space_subregion() with iada_offset. DMA SUPPORT
No additional support is provided for IOASIC DMA beyond the facilities provided by the bus_dma(9) interface. The IOASIC provides two pairs of DMA address pointers (transmitting and receiving) for each DMA-capable device. The pair of address pointers point to consecutive (but not necessarily contiguous) DMA blocks of size IOASIC_DMA_BLOCKSIZE. Upon successful transfer of the first block, DMA continues to the next block and an interrupt is posted to signal an address pointer update. DMA transfers are enabled and disabled by bits inside the IOASIC status (CSR) register. The interrupt handler must update the address pointers to point to the next block in the DMA transfer. The address pointer update must be completed before the completion of the second DMA block, otherwise a DMA overrun error condition will occur. CODE REFERENCES
The IOASIC subsystem itself is implemented within the file sys/dev/tc/ioasic_subr.c. Machine-dependent portions can be found in sys/arch/<arch>/tc/ioasic.c. SEE ALSO
ioasic(4), autoconf(9), bus_dma(9), bus_space(9), driver(9) BSD
August 6, 2000 BSD
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