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iicbus(4) [netbsd man page]

IICBUS(4)						   BSD Kernel Interfaces Manual 						 IICBUS(4)

NAME
iicbus -- I2C bus system SYNOPSIS
device iicbus device iicbb device iic device ic device iicsmb DESCRIPTION
The iicbus system provides a uniform, modular and architecture-independent system for the implementation of drivers to control various I2C devices and to utilize different I2C controllers. I2C I2C is an acronym for Inter Integrated Circuit bus. The I2C bus was developed in the early 1980's by Philips semiconductors. Its purpose was to provide an easy way to connect a CPU to peripheral chips in a TV-set. The BUS physically consists of 2 active wires and a ground connection. The active wires, SDA and SCL, are both bidirectional. Where SDA is the Serial DAta line and SCL is the Serial CLock line. Every component hooked up to the bus has its own unique address whether it is a CPU, LCD driver, memory, or complex function chip. Each of these chips can act as a receiver and/or transmitter depending on its functionality. Obviously an LCD driver is only a receiver, while a memory or I/O chip can both be transmitter and receiver. Furthermore there may be one or more BUS MASTERs. The BUS MASTER is the chip issuing the commands on the BUS. In the I2C protocol specification it is stated that the IC that initiates a data transfer on the bus is considered the BUS MASTER. At that time all the others are regarded to as the BUS SLAVEs. As mentioned before, the IC bus is a Multi-MASTER BUS. This means that more than one IC capable of initiating data transfer can be connected to it. DEVICES
Some I2C device drivers are available: Devices Description iic general i/o operation ic network IP interface iicsmb I2C to SMB software bridge INTERFACES
The I2C protocol may be implemented by hardware or software. Software interfaces rely on very simple hardware, usually two lines twiddled by 2 registers. Hardware interfaces are more intelligent and receive 8-bit characters they write to the bus according to the I2C protocol. I2C interfaces may act on the bus as slave devices, allowing spontaneous bidirectional communications, thanks to the multi-master capabili- ties of the I2C protocol. Some I2C interfaces are available: Interface Description pcf Philips PCF8584 master/slave interface iicbb generic bit-banging master-only driver lpbb parallel port specific bit-banging interface bktr Brooktree848 video chipset, hardware and software master-only interface SEE ALSO
iicbb(4), lpbb(4), pcf(4) HISTORY
The iicbus manual page first appeared in FreeBSD 3.0. AUTHORS
This manual page was written by Nicolas Souchu. BSD
August 6, 1998 BSD

Check Out this Related Man Page

I2CGET(8)						      System Manager's Manual							 I2CGET(8)

NAME
i2cget - read from I2C/SMBus chip registers SYNOPSIS
i2cget [-f] [-y] i2cbus chip-address [data-address [mode]] i2cget -V DESCRIPTION
i2cget is a small helper program to read registers visible through the I2C bus (or SMBus). OPTIONS
-V Display the version and exit. -f Force access to the device even if it is already busy. By default, i2cget will refuse to access a device which is already under the control of a kernel driver. Using this flag is dangerous, it can seriously confuse the kernel driver in question. It can also cause i2cget to return an invalid value. So use at your own risk and only if you know what you're doing. -y Disable interactive mode. By default, i2cget will wait for a confirmation from the user before messing with the I2C bus. When this flag is used, it will perform the operation directly. This is mainly meant to be used in scripts. Use with caution. There are two required options to i2cget. i2cbus indicates the number or name of the I2C bus to be scanned. This number should correspond to one of the busses listed by i2cdetect -l. chip-address specifies the address of the chip on that bus, and is an integer between 0x03 and 0x77. data-address specifies the address on that chip to read from, and is an integer between 0x00 and 0xFF. If omitted, the currently active register will be read (if that makes sense for the considered chip). The mode parameter, if specified, is one of the letters b, w or c, corresponding to a read byte data, a read word data or a write byte/read byte transaction, respectively. A p can also be appended to the mode parameter to enable PEC. If the mode parameter is omitted, i2cget defaults to a read byte data transaction, unless data-address is also omitted, in which case the default (and only valid) transaction is a single read byte. WARNING
i2cget can be extremely dangerous if used improperly. I2C and SMBus are designed in such a way that an SMBus read transaction can be seen as a write transaction by certain chips. This is particularly true if setting mode to cp (write byte/read byte with PEC). Be extremely careful using this program. SEE ALSO
i2cdump(8), i2cset(8) AUTHOR
Jean Delvare This manual page was strongly inspired from those written by David Z Maze for i2cset. May 2008 I2CGET(8)
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