ARM_SYNC_ICACHE(2) BSD/arm System Calls Manual ARM_SYNC_ICACHE(2)NAME
arm_sync_icache -- clean the CPU data cache and flush the CPU instruction cache
ARM Architecture Library (libarm, -larm)
arm_sync_icache(u_int addr, int len);
arm_sync_icache() will make sure that all the entries in the processor instruction cache are synchronized with main memory and that any data
in a write back cache has been cleaned. Some ARM processors (e.g. SA110) have separate instruction and data caches thus any dynamically gen-
erated or modified code needs to be written back from any data caches to main memory and the instruction cache needs to be synchronized with
On such processors arm_sync_icache() will clean the data cache and invalidate the processor instruction cache to force reloading from main
memory. On processors that have a shared instruction and data cache and have a write through cache (e.g. ARM6) no action needs to be taken.
The routine takes a start address addr and a length len to describe the area of memory that needs to be cleaned and synchronized.
arm_sync_icache() will never fail so will always return 0.
StrongARM Data Sheet
BSD March 29, 2002 BSD
Check Out this Related Man Page
CACHE(3) BSD Library Functions Manual CACHE(3)NAME
sys_cache_control, sys_icache_invalidate, sys_dcache_flush -- cache control
Standard C Library (libc, -lc)
sys_cache_control(int function, void *start, size_t len);
sys_icache_invalidate(void *start, size_t len);
sys_dcache_flush(void *start, size_t len);
These functions operate on every cache line containing one of the len bytes of memory pointed to by start. Normally the operations apply to
every processor in the system, but the exact semantics of these operations is platform dependent. They should be used with caution.
sys_cache_control() performs the operation specified by function. Refer to the header file for a list of currently supported functions.
sys_icache_invalidate() prepares memory for execution, typically by invalidating the instruction cache for the indicated range. This should
be called after writing machine instructions to memory, and before executing them. On IA32 processors this function is a NOP, because their
instruction caches are coherent.
sys_dcache_flush() writes modified data cache lines to main memory, and then invalidates all lines in the range being operated on. It can be
useful when dealing with cache incoherent devices or DMA.
sys_cache_control() returns zero on success, ENOTSUP if function is not valid.
SEE ALSO atomic(3), barrier(3)HISTORY
These functions first appeared in Mac OS 10.5 (Leopard).
Darwin September 21, 2006 Darwin
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