libpfm_intel_hsw(3) [centos man page]

LIBPFM(3)						     Linux Programmer's Manual							 LIBPFM(3)

NAME

       libpfm_intel_hsw - support for Intel Haswell core PMU

SYNOPSIS

       #include <perfmon/pfmlib.h>

       PMU name: hsw
       PMU desc: Intel Haswell

DESCRIPTION

       The  library  supports  the  Intel  Haswell core PMU. It should be noted that this PMU model only covers each core's PMU and not the socket
       level PMU.

       On Haswell, the number of generic counters depends on the Hyperthreading (HT) mode.  When HT is on, then only 4 generic counters are avail-
       able. When HT is off, then 8 generic counters are available. The pfm_get_pmu_info() function returns the maximum number of generic counters
       in num_cntrs.

MODIFIERS

       The following modifiers are supported on Intel Haswell processors:

       u      Measure at user level which includes privilege levels 1, 2, 3. This corresponds to PFM_PLM3.  This is a boolean modifier.

       k      Measure at kernel level which includes privilege level 0. This corresponds to PFM_PLM0.  This is a boolean modifier.

       i      Invert the meaning of the event. The counter will now count cycles in which the event is not occurring. This is a boolean modifier

       e      Enable edge detection, i.e., count only when there is a state transition from no occurrence of the event to at least one occurrence.
	      This modifier must be combined with a counter mask modifier (m) with a value greater or equal to one.  This is a boolean modifier.

       c      Set  the counter mask value. The mask acts as a threshold. The counter will count the number of cycles in which the number of occur-
	      rences of the event is greater or equal to the threshold. This is an integer modifier with values in the range [0:255].

       t      Measure on both threads at the same time assuming hyper-threading is enabled. This is a boolean modifier.

       ldlat  Pass a latency threshold to the MEM_TRANS_RETIRED:LOAD_LATENCY event.  This is an integer  attribute  that  must	be  in	the  range
	      [3:65535]. It is required for this event.  Note that the event must be used with precise sampling (PEBS).

OFFCORE_RESPONSE events
       Intel Haswell provides two offcore_response events. They are called OFFCORE_RESPONSE_0 and OFFCORE_RESPONSE_1.

       Those  events  need  special treatment in the performance monitoring infrastructure because each event uses an extra register to store some
       settings. Thus, in case multiple offcore_response events are monitored simultaneously, the kernel needs to manage the sharing of that extra
       register.

       The  offcore_response  events  are exposed as a normal events by the library. The extra settings are exposed as regular umasks. The library
       takes care of encoding the events according to the underlying kernel interface.

       On Intel Haswell, the umasks are divided into three categories: request, supplier and snoop. The user must provide at least one	umask  for
       each category. The categories are shown in the umask descriptions.

       There  is  also the special response umask called ANY_RESPONSE. When this umask is used then it overrides any supplier and snoop umasks. In
       other words, users can specify either ANY_RESPONSE OR any combinations of supplier + snoops.

       In case no supplier or snoop is specified, the library defaults to using ANY_RESPONSE.

       For instance, the following are valid event selections:

       OFFCORE_RESPONSE_0:DMND_DATA_RD:ANY_RESPONSE

       OFFCORE_RESPONSE_0:ANY_REQUEST

       OFFCORE_RESPONSE_0:ANY_RFO:LLC_HITM:SNOOP_ANY

       But the following are illegal:

       OFFCORE_RESPONSE_0:ANY_RFO:LLC_HITM:ANY_RESPONSE

       OFFCORE_RESPONSE_0:ANY_RFO:LLC_HITM:SNOOP_ANY:ANY_RESPONSE

AUTHORS

       Stephane Eranian <eranian@gmail.com>

								    April, 2013 							 LIBPFM(3)

Check Out this Related Man Page

LIBPFM(3)						     Linux Programmer's Manual							 LIBPFM(3)

NAME

       libpfm_intel_snbep_unc_ubo - support for Intel Sandy Bridge-EP U-Box uncore PMU

SYNOPSIS

       #include <perfmon/pfmlib.h>

       PMU name: snbep_unc_ubo
       PMU desc: Intel Sandy Bridge-EP U-Box uncore PMU

DESCRIPTION

       The library supports the Intel Sandy Bridge system configuration unit (U-Box) uncore PMU.  This PMU model only exists on Sandy Bridge model
       45. There is only one U-Box PMU per processor socket.

MODIFIERS

       The following modifiers are supported on Intel Sandy Bridge U-Box uncore PMU:

       i      Invert the meaning of the event. The counter will now count HA cycles in which the event is not occurring. This is a  boolean  modi-
	      fier

       e      Enable edge detection, i.e., count only when there is a state transition from no occurrence of the event to at least one occurrence.
	      This modifier must be combined with a threshold modifier (t) with a value greater or equal to one.  This is a boolean modifier.

       t      Set the threshold value. When set to a non-zero value, the counter counts the number of HA cycles in which the number of occurrences
	      of the event is greater or equal to the threshold.  This is an integer modifier with values in the range [0:15].

       oi     Invert  the  meaning  of	the occupancy event POWER_STATE_OCCUPANCY. The counter will now count PCU cycles in which the event is not
	      occurring. This is a boolean modifier

       oe     Enable edge detection for the occupancy event POWER_STATE_OCCUPANCY. The event now counts only when there is a state transition from
	      no  occurrence  of  the  event to at least one occurrence. This modifier must be combined with a threshold modifier (t) with a value
	      greater or equal to one.	This is a boolean modifier.

       ff     Enable frequency band filtering. This modifier applies only to the UNC_P_FREQ_BANDx_CYCLES events, where x is [0-3].  The  modifiers
	      expects  an integer in the range [0-255]. The value is interpreted as a frequency value to be multipled by 100Mhz. Thus if the value
	      is 32, then all cycles where the processor is running at 3.2GHz and more are counted.

Frequency band filtering
       There   are   3	 events   which   support   frequency	band   filtering,   namely,   UNC_P_FREQ_BAND0_CYCLES,	  UNC_P_FREQ_BAND1_CYCLES,
       UNC_P_FREQ_BAND2_CYCLES, UNC_P_FREQ_BAND3_CYCLES. The frequency filter (available via the ff modifier) is stored into a PMU shared register
       which hold all 4 possible frequency bands, one per event. However, the library generate the encoding for each event individually because it
       processes  events  one  at  a time. The caller or the underlying kernel interface may have to merge the band filter settings to program the
       filter register properly.

AUTHORS

       Stephane Eranian <eranian@gmail.com>

								   August, 2012 							 LIBPFM(3)

Linux and UNIX Man Pages

libpfm_intel_hsw(3) [centos man page]

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