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Full Discussion: about Sun 9 HCL
Operating Systems Solaris about Sun 9 HCL Post 50851 by qmemo on Tuesday 4th of May 2004 09:22:00 AM
Old 05-04-2004
Java about Sun 9 HCL

Hi all I cheked the HCL of my hardware
ok first thing does it mean not seeing a dvice in the HCL that's it's not supported?
well my hardware is (x86 arch.)
My Hardware list : I Have a 1.70 intel Pentium 4 processor, 384 MB Ram, WD 40 GB Hard Disk, Aopen Riva TNT2 Model 64 VGA card
,ATAPI CD-Rom, SAMSUNG CD-R/RW, C-MEDIA Pci Card (On Board), Mother Board (Chantec)

that's for now waiting for your replyes


qmemo
 

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cpc_event(3CPC) 				    CPU Performance Counters Library Functions					   cpc_event(3CPC)

NAME
cpc_event - data structure to describe CPU performance counters SYNOPSIS
#include <libcpc.h> DESCRIPTION
The libcpc interfaces manipulate CPU performance counters using the cpc_event_t data structure. This structure contains several fields that are common to all processors, and some that are processor-dependent. These structures can be declared by a consumer of the API, thus the size and offsets of the fields and the entire data structure are fixed per processor for any particular version of the library. See cpc_version(3CPC) for details of library versioning. SPARC For UltraSPARC, the structure contains the following members: typedef struct { int ce_cpuver; hrtime_t ce_hrt; uint64_t ce_tick; uint64_t ce_pic[2]; uint64_t ce_pcr; } cpc_event_t; x86 For Pentium, the structure contains the following members: typedef struct { int ce_cpuver; hrtime_t ce_hrt; uint64_t ce_tsc; uint64_t ce_pic[2]; uint32_t ce_pes[2]; #define ce_cesr ce_pes[0] } cpc_event_t; The APIs are used to manipulate the highly processor-dependent control registers (the ce_pcr, ce_cesr, and ce_pes fields); the programmer is strongly advised not to reference those fields directly in portable code. The ce_pic array elements contain 64-bit accumulated counter values. The hardware registers are virtualized to 64-bit quantities even though the underlying hardware only supports 32-bits (UltraSPARC) or 40-bits (Pentium) before overflow. The ce_hrt field is a high resolution timestamp taken at the time the counters were sampled by the kernel. This uses the same timebase as gethrtime(3C). On SPARC V9 machines, the number of cycles spent running on the processor is computed from samples of the processor-dependent %tick regis- ter, and placed in the ce_tick field. On Pentium processors, the processor-dependent time-stamp counter register is similarly sampled and placed in the ce_tsc field. ATTRIBUTES
See attributes(5) for descriptions of the following attributes: +-----------------------------+-----------------------------+ | ATTRIBUTE TYPE | ATTRIBUTE VALUE | +-----------------------------+-----------------------------+ |Interface Stability |Evolving | +-----------------------------+-----------------------------+ SEE ALSO
gethrtime(3C), cpc(3CPC), cpc_version(3CPC), libcpc(3LIB), attributes(5) SunOS 5.11 12 May 2003 cpc_event(3CPC)
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