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Operating Systems Solaris T5220 not able to boot from USB Post 303029195 by jlliagre on Wednesday 23rd of January 2019 05:02:17 AM
Old 01-23-2019
T5220 support ended with Solaris 11.3.

See End of Feature Notices for Oracle Solaris 11

> End of Features (EOF) for Oracle Solaris 11.4
--> SPARC: Legacy System Support
----> Support for the following legacy systems is no longer available, and you will not be able to upgrade these systems to Oracle Solaris 11.4.
------> Platforms based on UltraSPARC T2 CPUs: Sun SPARC Enterprise T5120 and T5220, Sun Blade T6230, Netra CP3260, and Netra T5220
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isalist(5)																isalist(5)

NAME
isalist - the native instruction sets known to Solaris software The possible instruction set names returned by isalist(1) and the SI_ISALIST command of sysinfo(2) are listed here. The list is ordered within an instruction set family in the sense that later names are generally faster then earlier names; note that this is in the reverse order than listed by isalist(1) and sysinfo(2). In the following list of values, numbered entries generally represent increasing performance; lettered entries are either mutually exclusive or cannot be ordered. SPARC Platforms Where appropriate, correspondence with a given value of the -xarch option of Sun's C 4.0 compiler is indicated. Other compilers may have similar options. 1a. sparc Indicates the SPARC V8 instruction set, as defined in The SPARC Architecture Manual, Version 8, Prentice-Hall, Inc., 1992. Some instructions (such as integer multiply and divide, FSMULD, and all floating point operations on quad operands) may be emulated by the kernel on certain systems. 1b. sparcv7 Same as sparc. This corresponds to code produced with the -xarch=v7 option of Sun's C 4.0 compiler. 2. sparcv8-fsmuld Like sparc, except that integer multiply and divide must be executed in hardware. This corresponds to code produced with the -xarch=v8a option of Sun's C 4.0 compiler. 3. sparcv8 Like sparcv8-fsmuld, except that FSMULD must also be executed in hardware. This corresponds to code produced with the -xarch=v8 option of Sun's C 4.0 compiler. 4. sparcv8plus Indicates the SPARC V8 instruction set plus those instructions in the SPARC V9 instruction set, as defined in The SPARC Architecture Manual, Version 9, Prentice-Hall, 1994, that can be used according to The V8+ Technical Specification. This corresponds to code pro- duced with the -xarch=v8plus option of Sun's C 4.0 compiler. 5a. sparcv8plus+vis Like sparcv8plus, with the addition of those UltraSPARC I Visualization Instructions that can be used according to The V8+ Technical Specification. This corresponds to code produced with the -xarch=v8plusa option of Sun's C 4.0 compiler. 5b. sparcv8plus+fmuladd Like sparcv8plus, with the addition of the Fujitsu SPARC64 floating multiply-add and multiply-subtract instructions. 6. sparcv9 Indicates the SPARC V9 instruction set, as defined in The SPARC Architecture Manual, Version 9, Prentice-Hall, 1994. 7a. sparcv9+vis Like sparcv9, with the addition of the UltraSPARC I Visualization Instructions. 7b. sparcv9+vis2 Like sparcv9, with the addition of the UltraSPARC III Visualization Instructions. 7c. sparcv9+fmuladd Like sparcv9, with the addition of the Fujitsu SPARC64 floating multiply-add and multiply-subtract instructions. Platforms 1. i386 The Intel 80386 instruction set, as described in The i386 Microprocessor Programmer's Reference Manual. 2. i486 The Intel 80486 instruction set, as described in The i486 Microprocessor Programmer's Reference Manual. (This is effectively i386, plus the CMPXCHG, BSWAP, and XADD instructions.) 3. pentium The Intel Pentium instruction set, as described in The Pentium Processor User's Manual. (This is effectively i486, plus the CPU_ID instruction, and any features that the CPU_ID instruction indicates are present.) 4. pentium+mmx Like pentium, with the MMX instructions guaranteed present. 5. pentium_pro The Intel PentiumPro instruction set, as described in The PentiumPro Family Developer's Manual. (This is effectively pentium, with the CMOVcc, FCMOVcc, FCOMI, and RDPMC instructions guaranteed present.) 6. pentium_pro+mmx Like pentium_pro, with the MMX instructions guaranteed present. 7. amd64 The AMD Opteron instruction set, as described in the AMD64 Architecture Programmer's Manual. isalist(1), sysinfo(2) 6 Jan 2005 isalist(5)
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