Besides that, I do not comprehend the purpose of "-I". [...] But doesn't always gcc looks in the current directory for .h files?
Not gcc but actually cpp. It is convenient to think of the compiler as one huge, monolithic program but this is not the case. And the preprocessor - cpp - is the first one in the chain that devours source code and digests it to executable code.
You can actually bring cpp to show you the default location(s) it would look at for header files by issuing cpp -v. The relevant part of the output would look similar to (the redirection is necessary, otherwise it waits for input):
Quote:
Originally Posted by colt
As far as I know, it's the double "" around a .h file that makes gcc look in the current directory for the file, if it was <>, it would look for them in the global directories like /usr/include.
Apart from"see above", this is "more or less correct but not quite". ;-)) In fact the preprocessor doesn't look in the current directory but the one where the source file is located. If you compile a source file in the current directory (which is mostly the case) this makes no difference but if you do:
and in the source there is the line #include "myprogram.h" then cpp would look in /some/where/ for myprogram.h and not your current directory /my/current/directory. I suppose this makes a lot more sense than if it would be the other way round.
Regarding your question about the location of CFLAGS: be aware that the construction of the commandline is done simply by text replacement. Where the name of a variable (like $(CFLAGS)) stands it is replaced by the content of that variable. The called program will only "see" the result of these replacements, so ask yourself: would the resulting compiler call be syntactically correct or not?
Hi, I'm trying to run the module load command in a Makefile and i'm getting the following error:
make: module: command not found
Why is this? Is there any way to run this command in a Makefile?
NOTE: command - module load msjava/sunjdk/1.5.0 works fine outside of the Makefile (2 Replies)
I have 2 libraries in 2 different directories that I build with Makefiles.
library B depends on library A. If I modify a .cpp file in library A and run lib B's Makefile can I have B's makefile to automatically rebuild library A?
I am now rebuilding A, followed by B... but I'd like B to... (0 Replies)
Hello guys !
Need a bit of help is compiling a code, the makefile for which was originally designed to work on a 32-bit Linux platform, for a 64-bit Linux platform.
My platform is Ubuntu 10.04 LTS 64-bit. I am trying to compile a code called csim, file name csim-1.1.tar.gz. To compile this... (0 Replies)
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1. The problem statement, all variables and given/known data:
Basically, the prompt is make a makefile with various sub makefiles in their respective subdirectories. All code... (1 Reply)
Hello,
I am attempting to build gcc 4.0.4 on my Mac (OS X). When I use the "make" command, it returns with something like this:
Makefile:6089: *** missing separator. Stop.
This means that at the given line, I must go into the file and insert a TAB before the contents of that line. I have... (1 Reply)
Hello All,
I have a file, but I want to separate the file at a particular record with comma"," in the line
Input file
APPLE6SSAMSUNGS5PRICEPERPIECEDOLLAR600EACH010020340URX581949695US
to
Output file
APPLE6S,SAMSUNGS5,PRICEPERPIECE,DOLLAR600EACH,010020340URX581949695,US
This is for... (11 Replies)
Hello everybody, I'll get one more help
I have a cabundle file that I need to separate into 2 parts, the first sequence and the second sequence, I thought of several things but I did not remember anything that could actually accomplish this separation and transform into 2 variables, first... (4 Replies)