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Top Forums UNIX for Advanced & Expert Users The UNIX clock/timer interrupt Post 302958811 by Corona688 on Monday 26th of October 2015 03:01:33 PM
Old 10-26-2015
The IBM PC has had a pulse generator/timer from the beginning (which also used to drive the PC speaker.) In the olden days, before LSI, it was its own separate chip attached to the data bus. It was very flexible, but generally configured to generate hardware interrupts at 18ms intervals. This hardware interrupt is an IRQ, pretty much hardwired into the CPU, causing it to stop whatever it's doing and jump to a hardwired location in RAM. The OS can do whatever it pleases with that interrupt by putting code in that location.

The hardware is going to be very different on non-PC architectures but the idea is the same, a pulse generator wired to the CPU.

If you're really curious about historical PC architecture, and have a bent towards electronics, I suggest The 8088 book. The 8088 as much as anything else is responsible for why the PC is the way it is.

Last edited by Corona688; 10-26-2015 at 04:21 PM..
 

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HPET(4) 						   BSD Kernel Interfaces Manual 						   HPET(4)

NAME
hpet -- High Precision Event Timer driver SYNOPSIS
To compile this driver into the kernel, place the following lines in your kernel configuration file: device acpi The following tunables are settable from the loader(8): hint.hpet.X.allowed_irqs is a 32bit mask. Each set bit allows driver to use respective IRQ, if BIOS also set respective capability bit in comparator's configuration register. Default value is 0xffff0000, except some known broken hardware. hint.hpet.X.clock controls event timers functionality support. Setting to 0, disables it. Default value is 1. hint.hpet.X.legacy_route controls "LegacyReplacement Route" mode. If enabled, HPET will steal IRQ0 of i8254 timer and IRQ8 of RTC. Before using it, make sure that respective drivers are not using interrupts, by setting also: hint.attimer.0.clock=0 hint.atrtc.0.clock=0 Default value is 0. hint.hpet.X.per_cpu controls how much per-CPU event timers should driver attempt to register. This functionality requires every comparator in a group to have own unshared IRQ, so it depends on hardware capabilities and interrupts configuration. Default value is 1. DESCRIPTION
This driver uses High Precision Event Timer hardware (part of the chipset, usually enumerated via ACPI) to supply kernel with one time counter and several (usually from 3 to 8) event timers. This hardware includes single main counter with known increment frequency (10MHz or more), and several programmable comparators (optionally with automatic reload feature). When value of the main counter matches current value of any comparator, interrupt can be generated. Depending on hardware capabilities and configuration, interrupt can be delivered as regular I/O APIC interrupt (ISA or PCI) in range from 0 to 31, or as Front Side Bus interrupt, alike to PCI MSI interrupts, or in so called "Lega- cyReplacement Route" HPET can steal IRQ0 of i8254 and IRQ8 of the RTC. Interrupt can be either edge- or level-triggered. In last case they could be safely shared with PCI IRQs. Driver prefers to use FSB interrupts, if supported, to avoid sharing. If it is not possible, it uses single sharable IRQ from PCI range. Other modes (LegacyReplacement and ISA IRQs) require special care to setup, but could be configured man- ually via device hints. Event timers provided by the driver support both one-shot an periodic modes and irrelevant to CPU power states. Depending on hardware capabilities and configuration, driver can expose each comparator as separate event timer or group them into one or several per-CPU event timers. In last case interrupt of every of those comparators within group is bound to specific CPU core. This is possi- ble only when each of these comparators has own unsharable IRQ. SEE ALSO
acpi(4), apic(4), atrtc(4), attimer(4), eventtimers(4), timecounters(4) HISTORY
The hpet driver first appeared in FreeBSD 6.3. Support for event timers was added in FreeBSD 9.0. BSD
September 14, 2010 BSD
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