Sponsored Content
Full Discussion: Problem creating a makefile
Top Forums Programming Problem creating a makefile Post 302669975 by Corona688 on Wednesday 11th of July 2012 01:05:00 PM
Old 07-11-2012
Make both executables separate rules, then, and have an 'all' rule which requires both of them so both get made when you do 'make all'.

Code:
all:executable1 executable2

executable1:object1.o
        $(CC) object1.o $(LDFLAGS) -o $@

executable2:object2.o
        $(CC) object2.o $(LDFLAGS) -o $@

 

10 More Discussions You Might Find Interesting

1. UNIX for Advanced & Expert Users

problem with Makefile

Hi, I have a makefile which looks like this ProcessA : commands touch pro1 ProcessB : pro1 commands touch pro2 ProcessC: pro3 commands and after some runs, i wish only pro3 to run and I check that "pro1" and "pro2" are there in the directory, but still, if i give make... (3 Replies)
Discussion started by: sskb
3 Replies

2. UNIX for Advanced & Expert Users

Creating new system Makefile template

I am attempting to set-up a Makefile to use for a new system on a Sun Unix machine. I am new to creating Makefiles. I am trying to start simply by compiling a program. I am getting the following error message but an uncertain what 'Error Code 1' is. Is there a web site with Error Codes... (1 Reply)
Discussion started by: CaptainRo
1 Replies

3. Programming

Problem with a Makefile

Hi, I am very new with makefile topics , maybe this is a very symple question... I have this code wich compile very good ( I get it from the net), I will call it code A. I have to add it with a program that is all ready in use, (code B) that also compile good. When I put together it doesnt... (7 Replies)
Discussion started by: pmoren
7 Replies

4. Programming

Problem with makefile

My make file is CFLAGS = -Wall -g LDFLAGS = -lm CC = g++ all: server client rc4.o: rc4.cpp rc4.h ${CC} ${CFLAGS} -c rc4.cpp server.o: server.cpp rc4.h ${CC} ${CFLAGS} -c .cpp client.o: client.cpp rc4.h ${CC} ${CFLAGS} -c client.cpp server: server.o... (2 Replies)
Discussion started by: neerajgoyal12
2 Replies

5. UNIX for Advanced & Expert Users

Makefile problem - How to run module load in a Makefile

Hi, I'm trying to run the module load command in a Makefile and i'm getting the following error: make: module: command not found Why is this? Is there any way to run this command in a Makefile? NOTE: command - module load msjava/sunjdk/1.5.0 works fine outside of the Makefile (2 Replies)
Discussion started by: hernandinho
2 Replies

6. Programming

please help me with this big makefile problem

I need to create an executable with these two makefiles(they both have libaries i need(qt and ruby)) i have extconf.rb gui.ui gui_include.h main.cpp ScaleIM_client.rb ui_gui.h i want to combine them all into one executable please!... (2 Replies)
Discussion started by: gjgfuj
2 Replies

7. UNIX for Advanced & Expert Users

Help in creating a makefile

Hi, I wanted to know whether there is any way to specify in a makefile how to compile sources from a directory directly by giving the directory path name instead of mentioning each and every source file name. Regards, Anil (1 Reply)
Discussion started by: anil_lami
1 Replies

8. Programming

Problem with Makefile

Hi, Here is my makefile http://pastie.org/1104332. I am trying to compile different .c files and .s files (assembly files) from different sub directories into E:/em35x/build/mfg-sample-app-cortexm3-iar-em357-em3xx-dev0680/ then the linker should link all the .o files from the build directory... (1 Reply)
Discussion started by: blade2008
1 Replies

9. Emergency UNIX and Linux Support

Problem With Makefile

I had created a Makefile for my project. my project file hierarchy is like this: 1. a source folder with main.c and Makefile in it 2. and a top level Makefile here is the Makefile in src folder all: program program: main.c gcc -o program main.c clean: rm programand here is top... (3 Replies)
Discussion started by: majid.merkava
3 Replies

10. Shell Programming and Scripting

Question in creating targets in makefile

Hi, I have a question related to makefile. I'm new to makefile and I'm in the process of writing a makefile for my RBT build. I have multiple source files and when I compile them I will get multiple object files (one object file for each source file). I'm having problem in creating a target for... (1 Reply)
Discussion started by: Anand Venkatesa
1 Replies
MAKE(1) 						      General Commands Manual							   MAKE(1)

NAME
make - a program for maintaining large programs SYNOPSIS
make [-f file] [-iknpqrst] [option] ... [target] OPTIONS
-f Use file as the makefile -i Ignore status returned by commands -k On error, skip to next command -n Report, but do not execute -p Print macros and targets -q Question up-to-dateness of target -r Rule inhibit; do not use default rules -s Silent mode -t Touch files instead of making them EXAMPLES
make kernel # Make kernel up to date make -n -f mfile # Tell what needs to be done DESCRIPTION
Make is a program that is normally used for developing large programs consisting of multiple files. It keeps track of which object files depend on which source and header files. When called, it does the minimum amount of recompilation to bring the target file up to date. The file dependencies are expected in makefile or Makefile , unless another file is specified with -f. Make has some default rules built in, for example, it knows how to make .s files from .c files. Here is a sample makefile . d=/user/ast # d is a macro program: head.s tail.s# program depends on these cc -o program head.s tail.s# tells how to make program echo Program done. # announce completion head.s: $d/def.h head.c # head.s depends on these tail.s: $d/var.h tail.c # tail.s depends on these A complete description of make would require too much space here. Many books on UNIX discuss make . Study the numerous Makefiles in the MINIX source tree for examples. SEE ALSO
cc(1). MAKE(1)
All times are GMT -4. The time now is 07:12 AM.
Unix & Linux Forums Content Copyright 1993-2022. All Rights Reserved.
Privacy Policy