An analogy from the compilation scene -- normally you would have lines in your Makefile like:
you would not have the *.c as targets because you would have created them with an editor (with the exception of things like lex/yacc generated files, in which case you would have entered the requisite base files for them).
If you really need something to create the *.txt files, then I suggest that you create an initialization script that touches a.txt, b.txt, etc. -- which is exactly what I did: it made the initial content of the [abcd].txt files to be "0" so that a) they existed, b) had a value with which the demonstration equivalent of myscript could work.
If your solution performs satisfactorily, then use it; if not, then you might consider the suggestion above.
Hi,
I am getting the following error while building on Solaris 64 , while I am trying to build.
Error Snippet :-
----------------------
Makefile:57: *** multiple target patterns. Stop.
make: Leaving directory `/work1/patch/vds6053sun64o/vobs/jvi'
make: *** Error 2
make: Leaving directory... (0 Replies)
Hi All
I need to parse the target
something like:
ifeq '$@' 'first'
echo 1 $@
endif
ifeq '$@' 'second'
echo 2 $@
endif
The thing is to be able compare the target string to any string and then do the commands
Thanks a lot
ziv (0 Replies)
Greetings!
I'm fairly new to the unix world and I hope someone here can help me with my question. I'm using a Makefile to run a few programs and the final output is several .eps files. However I need them to be .pdf files, so I want to use epstopdf to convert the files.
Since I'm already... (6 Replies)
Hi All
I am creating a makefile and I want to do a clean section.
In the clean section I would like to check if the file exists and then delete it.
I always have an error 'unexpected end of file'
What's wrong in it?
Thanks
msntn
firstCpp: first.cpp
g++ -o first first.cpp
clean:
... (1 Reply)
Hi,
As part of our project, we need to load historical data for a year before our system is live. We have the data feed files that we need to load. However, I need to make sure that the file structure (number of fields separated by a comma) on the field is same for all the files of the same... (1 Reply)
I have the following part of a makefile and want to simplify it
using rules rather than having to code the same two blocks
when I need ti build another program.
An having difficulty doing it
all: 1dvel2 1dvel 2dvel
... (8 Replies)
I am trying to create executables for the following files
Currently, I am making 9 different directories for for each. I would like to make 1 directory but everytime I try it does not work.
CROSS_COMPILE?=
# CROSS_COMPILE used to = arm-arago-linux-gnueabi... (1 Reply)
Hello,
I want to merge multiple files (under hundreds folders) side by side. File name are the same but folder are different.
like
folder1/same_name.txt
folder2/same_name.txt
folder3/same_name.txt
......Normally it can be done as
paste /different_path*/same_name.txt > merged_file.txtbut... (2 Replies)
Hi,
I have a question related to makefile. I'm new to makefile and I'm in the process of writing a makefile for my RBT build. I have multiple source files and when I compile them I will get multiple object files (one object file for each source file). I'm having problem in creating a target for... (1 Reply)
Discussion started by: Anand Venkatesa
1 Replies
LEARN ABOUT XFREE86
gccmakedep
gccmakedep(1) General Commands Manual gccmakedep(1)NAME
gccmakedep - create dependencies in makefiles using 'gcc -M'
SYNOPSIS
gccmakedep [ -sseparator ] [ -fmakefile ] [ -a ] [ -- options -- ] sourcefile ...
DESCRIPTION
The gccmakedep program calls 'gcc -M' to output makefile rules describing the dependencies of each sourcefile, so that make(1) knows which
object files must be recompiled when a dependency has changed.
By default, gccmakedep places its output in the file named makefile if it exists, otherwise Makefile. An alternate makefile may be speci-
fied with the -f option. It first searches the makefile for a line beginning with
# DO NOT DELETE
or one provided with the -s option, as a delimiter for the dependency output. If it finds it, it will delete everything following this up
to the end of the makefile and put the output after this line. If it doesn't find it, the program will append the string to the makefile
and place the output after that.
EXAMPLE
Normally, gccmakedep will be used in a makefile target so that typing 'make depend' will bring the dependencies up to date for the make-
file. For example,
SRCS = file1.c file2.c ...
CFLAGS = -O -DHACK -I../foobar -xyz
depend:
gccmakedep -- $(CFLAGS) -- $(SRCS)
OPTIONS
The program will ignore any option that it does not understand, so you may use the same arguments that you would for gcc(1), including -D
and -U options to define and undefine symbols and -I to set the include path.
-a Append the dependencies to the file instead of replacing existing dependencies.
-fmakefile
Filename. This allows you to specify an alternate makefile in which gccmakedep can place its output. Specifying "-" as the file
name (that is, -f-) sends the output to standard output instead of modifying an existing file.
-sstring
Starting string delimiter. This option permits you to specify a different string for gccmakedep to look for in the makefile. The
default is "# DO NOT DELETE".
-- options --
If gccmakedep encounters a double hyphen (--) in the argument list, then any unrecognized arguments following it will be silently
ignored. A second double hyphen terminates this special treatment. In this way, gccmakedep can be made to safely ignore esoteric
compiler arguments that might normally be found in a CFLAGS make macro (see the EXAMPLE section above). -D, -I, and -U options
appearing between the pair of double hyphens are still processed normally.
SEE ALSO gcc(1), make(1), makedepend(1).
AUTHOR
gccmakedep was written by the XFree86 Project based on code supplied by Hongjiu Lu.
Colin Watson wrote this manual page, originally for the Debian Project, based partly on the manual page for makedepend(1).
XFree86 Version 4.7.0 gccmakedep(1)