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Top Forums UNIX for Advanced & Expert Users makefile head-scratcher: multiple targets in one go Post 302494152 by treczoks on Saturday 5th of February 2011 05:31:13 PM
Old 02-05-2011
Question makefile head-scratcher: multiple targets in one go

Hi!

I've got a build process where scripts create multiple targets from their sources. But here I'm running into a conceptual problem of GNU make: If one has multiple targets in a dependency, make applies the rules once for every target that is out of sync - which is correct for normal compiling, but not here.

Lets say running myscript abcd.conf creates the files a.txt b.txt c.txt and d.txt in one go, and the script should be run if any of the targets are out of sync.

So I've got something like
Code:
a.txt b.txt c.txt d.txt : abcd.conf
  myscript abcd.conf

but that would run mysript abcd.conf four times when abcd.conf gets updated, with $@ pointing at each target in turn Smilie. As mysript is quite time- and resource-consuming, this is something I need to avoid. As any of the target files might get out of sync, I can't just select one to force a single run.

I've read the make documentation up and down to no avail, and found nothing useful on Google. My experiments so far have failed, and I'm fresh out of ideas.

I always considered make to be the "swiss army knife" of automated building processes, and used it for quite some odd things over the years, but now I could use some input:

Is that what I want to achieve even possible with GNU make or do I have to look for other options (perl or shell scripts are no problems)?

Is there something in the make documentation that I failed to see or understand properly?

Anyone out there with a clever makefile trick for this?

yours, Christian Treczoks
 

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ccmakedep(1)						      General Commands Manual						      ccmakedep(1)

NAME
ccmakedep - create dependencies in makefiles using a C compiler SYNOPSIS
ccmakedep [ cpp-flags ] [ -wwidth ] [ -smagic-string ] [ -fmakefile ] [ -oobject-suffix ] [ -v ] [ -a ] [ -cccompiler ] [ -- options -- ] sourcefile ... DESCRIPTION
The ccmakedep program calls a C compiler to preprocess each sourcefile, and uses the output to construct makefile rules describing their dependencies. These rules instruct make(1) on which object files must be recompiled when a dependency has changed. By default, ccmakedep places its output in the file named makefile if it exists, otherwise Makefile. An alternate makefile may be speci- fied with the -f option. It first searches the makefile for a line beginning with # DO NOT DELETE or one provided with the -s option, as a delimiter for the dependency output. If it finds it, it will delete everything following this up to the end of the makefile and put the output after this line. If it doesn't find it, the program will append the string to the makefile and place the output after that. EXAMPLE
Normally, ccmakedep will be used in a makefile target so that typing 'make depend' will bring the dependencies up to date for the makefile. For example, SRCS = file1.c file2.c ... CFLAGS = -O -DHACK -I../foobar -xyz depend: ccmakedep -- $(CFLAGS) -- $(SRCS) OPTIONS
The program will ignore any option that it does not understand, so you may use the same arguments that you would for cc(1), including -D and -U options to define and undefine symbols and -I to set the include path. -a Append the dependencies to the file instead of replacing existing dependencies. -cccompiler Use this compiler to generate dependencies. -fmakefile Filename. This allows you to specify an alternate makefile in which ccmakedep can place its output. Specifying "-" as the file name (that is, -f-) sends the output to standard output instead of modifying an existing file. -sstring Starting string delimiter. This option permits you to specify a different string for ccmakedep to look for in the makefile. The default is "# DO NOT DELETE". -v Be verbose: display the C compiler command before running it. -- options -- If ccmakedep encounters a double hyphen (--) in the argument list, then any unrecognized arguments following it will be silently ignored. A second double hyphen terminates this special treatment. In this way, ccmakedep can be made to safely ignore esoteric compiler arguments that might normally be found in a CFLAGS make macro (see the EXAMPLE section above). -D, -I, and -U options appearing between the pair of double hyphens are still processed normally. SEE ALSO
cc(1), make(1), makedepend(1), ccmakedep(1). AUTHOR
ccmakedep was written by the X Consortium. Colin Watson wrote this manual page, originally for the Debian Project, based partly on the manual page for makedepend(1). X Version 11 imake 1.0.5 ccmakedep(1)
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