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Top Forums Programming pthread_mutex_lock in ANSI C vs using Atomic builtins of GCC Post 302467926 by Loic Domaigne on Monday 1st of November 2010 02:42:03 AM
Old 11-01-2010
Hi!

using pthreads synchronisation object (like mutex, read-write locks...) does more than just a simple "atomic access". It actually ensures proper memory visibility using appropriate memory barriers. Refer for instance to this article.

Cheers,
Loïc
 

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atomic_ops(3C)															    atomic_ops(3C)

NAME
atomic_ops - atomic operations SYNOPSIS
#include <atomic.h> This collection of functions provides atomic memory operations. There are 8 different classes of atomic operations: atomic_add(3C) These functions provide an atomic addition of a signed value to a variable. atomic_and(3C) These functions provide an atomic logical 'and' of a value to a variable. atomic_bits(3C) These functions provide atomic bit setting and clearing within a variable. atomic_cas(3C) These functions provide an atomic comparison of a value with a variable. If the comparison is equal, then swap in a new value for the variable, returning the old value of the variable in either case. atomic_dec(3C) These functions provide an atomic decrement on a variable. atomic_inc(3C) These functions provide an atomic increment on a variable. atomic_or(3C) These functions provide an atomic logical 'or' of a value to a variable. atomic_swap(3C) These functions provide an atomic swap of a value with a variable, returning the old value of the variable. See attributes(5) for descriptions of the following attributes: +-----------------------------+-----------------------------+ | ATTRIBUTE TYPE | ATTRIBUTE VALUE | +-----------------------------+-----------------------------+ |Interface Stability |Stable | +-----------------------------+-----------------------------+ |MT-Level |MT-Safe | +-----------------------------+-----------------------------+ atomic_add(3C), atomic_and(3C), atomic_bits(3C), atomic_cas(3C), atomic_dec(3C), atomic_inc(3C), atomic_or(3C), atomic_swap(3C), mem- bar_ops(3C), attributes(5) Atomic instructions ensure global visibility of atomically-modified variables on completion. In a relaxed store order system, this does not guarantee that the visibility of other variables will be synchronized with the completion of the atomic instruction. If such synchro- nization is required, memory barrier instructions must be used. See membar_ops(3C). Atomic instructions can be expensive. since they require synchronization to occur at a hardware level. This means they should be used with care to ensure that forcing hardware level synchronization occurs a minimum number of times. For example, if you have several variables that need to be incremented as a group, and each needs to be done atomically, then do so with a mutex lock protecting all of them being incremented rather than using the atomic_inc(3C) operation on each of them. 12 Aug 2004 atomic_ops(3C)
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