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Full Discussion: UltraSPARC T2 or T2+
Special Forums Hardware UltraSPARC T2 or T2+ Post 302421368 by jld on Friday 14th of May 2010 07:36:16 AM
Old 05-14-2010
The T5120 is the T2 processor not the T2+.

UltraSPARC T1 processor based models

The UltraSPARC T1-based Sun Fire T1000 and T2000 are branded to the SPARC Enterprise line:

* T1000 - 1 processor socket, 1U rack-mount
* T2000 - 1 processor socket, 2U rack-mount

UltraSPARC T2 processor based models

In Oct 2007, Sun added the UltraSPARC T2-based servers to the SPARC Enterprise line:

* T5120 - 1 processor socket, 1U rack-mount
* T5220 - 1 processor socket, 2U rack-mount

UltraSPARC T2+ processor based models

In April 2008, Sun added the UltraSPARC T2 Plus-based servers to the SPARC Enterprise line:

* T5140 - 2 processor sockets, 1U rack-mount
* T5240 - 2 processor sockets, 2U rack-mount

In October 2008, Sun released the 4-way SMP UltraSPARC T2 Plus-based server:

* T5440 - 4 processor sockets, 4U rack-mount
 

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cpc_event(3CPC) 				    CPU Performance Counters Library Functions					   cpc_event(3CPC)

NAME
cpc_event - data structure to describe CPU performance counters SYNOPSIS
#include <libcpc.h> DESCRIPTION
The libcpc interfaces manipulate CPU performance counters using the cpc_event_t data structure. This structure contains several fields that are common to all processors, and some that are processor-dependent. These structures can be declared by a consumer of the API, thus the size and offsets of the fields and the entire data structure are fixed per processor for any particular version of the library. See cpc_version(3CPC) for details of library versioning. SPARC For UltraSPARC, the structure contains the following members: typedef struct { int ce_cpuver; hrtime_t ce_hrt; uint64_t ce_tick; uint64_t ce_pic[2]; uint64_t ce_pcr; } cpc_event_t; x86 For Pentium, the structure contains the following members: typedef struct { int ce_cpuver; hrtime_t ce_hrt; uint64_t ce_tsc; uint64_t ce_pic[2]; uint32_t ce_pes[2]; #define ce_cesr ce_pes[0] } cpc_event_t; The APIs are used to manipulate the highly processor-dependent control registers (the ce_pcr, ce_cesr, and ce_pes fields); the programmer is strongly advised not to reference those fields directly in portable code. The ce_pic array elements contain 64-bit accumulated counter values. The hardware registers are virtualized to 64-bit quantities even though the underlying hardware only supports 32-bits (UltraSPARC) or 40-bits (Pentium) before overflow. The ce_hrt field is a high resolution timestamp taken at the time the counters were sampled by the kernel. This uses the same timebase as gethrtime(3C). On SPARC V9 machines, the number of cycles spent running on the processor is computed from samples of the processor-dependent %tick regis- ter, and placed in the ce_tick field. On Pentium processors, the processor-dependent time-stamp counter register is similarly sampled and placed in the ce_tsc field. ATTRIBUTES
See attributes(5) for descriptions of the following attributes: +-----------------------------+-----------------------------+ | ATTRIBUTE TYPE | ATTRIBUTE VALUE | +-----------------------------+-----------------------------+ |Interface Stability |Evolving | +-----------------------------+-----------------------------+ SEE ALSO
gethrtime(3C), cpc(3CPC), cpc_version(3CPC), libcpc(3LIB), attributes(5) SunOS 5.10 12 May 2003 cpc_event(3CPC)
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