Sponsored Content
Full Discussion: for loop in makefile
Top Forums Shell Programming and Scripting for loop in makefile Post 302402954 by vino on Thursday 11th of March 2010 02:56:11 AM
Old 03-11-2010
Quote:
Originally Posted by bhushana

Below is the part of my makefile:
-------------------------------------------------
Code:
lista = abc
listb = xyz
LIST=$(lista) $(listb)
list:
    @echo "The list is :"
    for p in  $(LIST); \
    do \
    echo $p ; \
    $(MAKE) -C ../$$p list_all ; \
    done

-------------------------------------------------
i want to print abc and xyz . However, the above echo $p statement is not giving the expected result.
What exactly is going wrong in the above code.
Try
Code:
echo $$p

instead of
Code:
echo $p

 

10 More Discussions You Might Find Interesting

1. UNIX for Dummies Questions & Answers

makefile

Hi, I've searched for makefile in Google and read the pages and tried, but can't seem to understand or get the results as shown in the examples. Can someone help on this? i normally compile my c files like this gcc sampleFile.c -o sampleFile how do I use makefile now instead? (4 Replies)
Discussion started by: scmay
4 Replies

2. Programming

about the makefile

can anyone well explain how to create a makefile? especially those commands in the makefile? BTW, what is CFLAG? (2 Replies)
Discussion started by: ligerdave
2 Replies

3. Programming

Makefile help

Hi, What I want to do is for make to reconstruct the target even if its dependencies have not changed. So, even if if the dependent files do not have a more recent timestamp, the commands are executed. The reason I want to do this.. 1)someone executes make on solaris. We have a solaris... (4 Replies)
Discussion started by: tantric
4 Replies

4. UNIX for Advanced & Expert Users

Makefile problem - How to run module load in a Makefile

Hi, I'm trying to run the module load command in a Makefile and i'm getting the following error: make: module: command not found Why is this? Is there any way to run this command in a Makefile? NOTE: command - module load msjava/sunjdk/1.5.0 works fine outside of the Makefile (2 Replies)
Discussion started by: hernandinho
2 Replies

5. Shell Programming and Scripting

Regarding Makefile

Hi friends, I have a problem with compiling makefile.While i am compiling makefile it always compiles 1 or 2 files inside that makefile even if nothing is changed in those files.If none of the changes are made in those file while compiling the makefile it should output like "file is upto date",... (0 Replies)
Discussion started by: s.sen1213
0 Replies

6. Programming

makefile help

Hi all, I'm new to make files . I'm writing a make file to compile and create .so files. i've 20 .cpp files. I want to compile one file at a time and then i've to create 1 .so for each file that i compiled. for eg: list.mk is having all the 20 .spp files. name = a.cpp name =+... (2 Replies)
Discussion started by: vij_krr
2 Replies

7. UNIX for Advanced & Expert Users

Makefile executing another Makefile first?

I have 2 libraries in 2 different directories that I build with Makefiles. library B depends on library A. If I modify a .cpp file in library A and run lib B's Makefile can I have B's makefile to automatically rebuild library A? I am now rebuilding A, followed by B... but I'd like B to... (0 Replies)
Discussion started by: wwuster
0 Replies

8. UNIX for Dummies Questions & Answers

Help with makefile

what does the -f mean in the following command ? make -f file and whats the difference if you don't add it? (2 Replies)
Discussion started by: omega666
2 Replies

9. Homework & Coursework Questions

Help with Simple Multi-Level Makefile (Extremely New at Makefile)

Use and complete the template provided. The entire template must be completed. If you don't, your post may be deleted! 1. The problem statement, all variables and given/known data: Basically, the prompt is make a makefile with various sub makefiles in their respective subdirectories. All code... (1 Reply)
Discussion started by: Tatl
1 Replies

10. Shell Programming and Scripting

awk loop using array:wish to store array values from loop for use outside loop

Here's my code: awk -F '' 'NR==FNR { if (/time/ && $5>10) A=$2" "$3":"$4":"($5-01) else if (/time/ && $5<01) A=$2" "$3":"$4-01":"(59-$5) else if (/time/ && $5<=10) A=$2" "$3":"$4":0"($5-01) else if (/close/) { B=0 n1=n2; ... (2 Replies)
Discussion started by: klane
2 Replies
gccmakedep(1)						      General Commands Manual						     gccmakedep(1)

NAME
gccmakedep - create dependencies in makefiles using 'gcc -M' SYNOPSIS
gccmakedep [ -sseparator ] [ -fmakefile ] [ -a ] [ -- options -- ] sourcefile ... DESCRIPTION
The gccmakedep program calls 'gcc -M' to output makefile rules describing the dependencies of each sourcefile, so that make(1) knows which object files must be recompiled when a dependency has changed. By default, gccmakedep places its output in the file named makefile if it exists, otherwise Makefile. An alternate makefile may be speci- fied with the -f option. It first searches the makefile for a line beginning with # DO NOT DELETE or one provided with the -s option, as a delimiter for the dependency output. If it finds it, it will delete everything following this up to the end of the makefile and put the output after this line. If it doesn't find it, the program will append the string to the makefile and place the output after that. EXAMPLE
Normally, gccmakedep will be used in a makefile target so that typing 'make depend' will bring the dependencies up to date for the make- file. For example, SRCS = file1.c file2.c ... CFLAGS = -O -DHACK -I../foobar -xyz depend: gccmakedep -- $(CFLAGS) -- $(SRCS) OPTIONS
The program will ignore any option that it does not understand, so you may use the same arguments that you would for gcc(1), including -D and -U options to define and undefine symbols and -I to set the include path. -a Append the dependencies to the file instead of replacing existing dependencies. -fmakefile Filename. This allows you to specify an alternate makefile in which gccmakedep can place its output. Specifying "-" as the file name (that is, -f-) sends the output to standard output instead of modifying an existing file. -sstring Starting string delimiter. This option permits you to specify a different string for gccmakedep to look for in the makefile. The default is "# DO NOT DELETE". -- options -- If gccmakedep encounters a double hyphen (--) in the argument list, then any unrecognized arguments following it will be silently ignored. A second double hyphen terminates this special treatment. In this way, gccmakedep can be made to safely ignore esoteric compiler arguments that might normally be found in a CFLAGS make macro (see the EXAMPLE section above). -D, -I, and -U options appearing between the pair of double hyphens are still processed normally. SEE ALSO
gcc(1), make(1), makedepend(1). AUTHOR
gccmakedep was written by the XFree86 Project based on code supplied by Hongjiu Lu. Colin Watson wrote this manual page, originally for the Debian Project, based partly on the manual page for makedepend(1). XFree86 Version 4.7.0 gccmakedep(1)
All times are GMT -4. The time now is 02:04 PM.
Unix & Linux Forums Content Copyright 1993-2022. All Rights Reserved.
Privacy Policy