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Full Discussion: for loop in makefile
Top Forums Shell Programming and Scripting for loop in makefile Post 302402949 by bhushana on Thursday 11th of March 2010 02:35:55 AM
Old 03-11-2010
for loop in makefile

Hi All,

I dont know if this is a right forum to ask the questions about makefile. Please redirect me to correct forum in case this is not right place.

Below is the part of my makefile:
-------------------------------------------------
Code:
lista = abc
listb = xyz
LIST=$(lista) $(listb)
list:
    @echo "The list is :"
    for p in  $(LIST); \
    do \
    echo $p ; \
    $(MAKE) -C ../$$p list_all ; \
    done

-------------------------------------------------
i want to print abc and xyz . However, the above echo $p statement is not giving the expected result.
What exactly is going wrong in the above code.

Last edited by vino; 03-11-2010 at 03:49 AM.. Reason: added code tags
 

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MAKE(1) 						      General Commands Manual							   MAKE(1)

NAME
make - a program for maintaining large programs SYNOPSIS
make [-f file] [-iknpqrst] [option] ... [target] OPTIONS
-f Use file as the makefile -i Ignore status returned by commands -k On error, skip to next command -n Report, but do not execute -p Print macros and targets -q Question up-to-dateness of target -r Rule inhibit; do not use default rules -s Silent mode -t Touch files instead of making them EXAMPLES
make kernel # Make kernel up to date make -n -f mfile # Tell what needs to be done DESCRIPTION
Make is a program that is normally used for developing large programs consisting of multiple files. It keeps track of which object files depend on which source and header files. When called, it does the minimum amount of recompilation to bring the target file up to date. The file dependencies are expected in makefile or Makefile , unless another file is specified with -f. Make has some default rules built in, for example, it knows how to make .s files from .c files. Here is a sample makefile . d=/user/ast # d is a macro program: head.s tail.s# program depends on these cc -o program head.s tail.s# tells how to make program echo Program done. # announce completion head.s: $d/def.h head.c # head.s depends on these tail.s: $d/var.h tail.c # tail.s depends on these A complete description of make would require too much space here. Many books on UNIX discuss make . Study the numerous Makefiles in the MINIX source tree for examples. SEE ALSO
cc(1). MAKE(1)
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