04-16-2009
It would mean fiddling with configuration bits at the chipset level. This sometimes happens in the linux kernel in quirks.c when it needs to do things like enable power management bits a manufacturer has ignorantly and obnoxiously left disabled. These bits are obscure and chipset-specific, often enough even motherboard-specific.
I don't know of a way to control these without rebuilding a kernel and rebooting into it, and in general, don't know how the bits themselves get set. I've just modified quirks.c to always think the motherboard's a known quirky model instead of checking its list. (which I had to do instead of adding to the known list of quirky models because compaq had also obnoxiously left out any PCI IDs that could uniquely identify the board!) But this was a specific thing for enabling a hidden smbus in a certain series of chipsets.
Last edited by Corona688; 04-16-2009 at 08:03 PM..
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PPC(4) BSD Kernel Interfaces Manual PPC(4)
NAME
ppc -- Parallel Port Chipset driver
SYNOPSIS
device ppc
In /boot/device.hints:
hint.ppc.0.at="isa"
hint.ppc.0.irq="7"
For one or more PPBUS busses:
device ppbus
DESCRIPTION
The ppc driver provides low level support to various parallel port chipsets for the ppbus(4) system.
During the probe phase, ppc detects parallel port chipsets and initializes private data according to their operating mode: COMPATIBLE, NIB-
BLE, PS/2, EPP, ECP and other mixed modes. If a mode is provided at startup through the flags variable of the boot interface, the operating
mode of the chipset is forced according to flags and the hardware supported modes.
During the attach phase, ppc allocates a ppbus structure, initializes it and calls the ppbus attach function.
Supported flags
bits 0-3: chipset forced mode(s)
PPB_COMPATIBLE 0x0 /* Centronics compatible mode */
PPB_NIBBLE 0x1 /* reverse 4 bit mode */
PPB_PS2 0x2 /* PS/2 byte mode */
PPB_EPP 0x4 /* EPP mode, 32 bit */
PPB_ECP 0x8 /* ECP mode */
And any mixed values.
bit 4: EPP protocol (0 EPP 1.9, 1 EPP 1.7)
bit 5: activate IRQ (1 IRQ disabled, 0 IRQ enabled)
bit 6: disable chipset specific detection
bit 7: disable FIFO detection
Supported chipsets
Some parallel port chipsets are explicitly supported: detection and initialisation code has been written according to their datasheets.
o SMC FDC37C665GT and FDC37C666GT chipsets
o Natsemi PC873xx-family (PC87332 and PC87306)
o Winbond W83877xx-family (W83877F and W83877AF)
o SMC-like chipsets with mixed modes (see ppbus(4))
Adding support to a new chipset
You may want to add support for the newest chipset your motherboard was sold with. For the ISA bus, just retrieve the specs of the chipset
and write the corresponding ppc_mychipset_detect() function. Then add an entry to the general purpose ppc_detect() function.
Your ppc_mychipset_detect() function should ensure that if the mode field of the flags boot variable is not null, then the operating mode is
forced to the given mode and no other mode is available and ppb->ppb_avm field contains the available modes of the chipset.
SEE ALSO
ppbus(4), ppi(4), device.hints(5)
HISTORY
The ppc manual page first appeared in FreeBSD 3.0.
AUTHORS
This manual page was written by Nicolas Souchu.
BUGS
The chipset detection process may corrupt your chipset configuration. You may disable chipset specific detection by using the above flags.
BSD
March 5, 1998 BSD