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Top Forums Programming Dependencies problem GNU automake Post 302281311 by Corona688 on Wednesday 28th of January 2009 03:02:39 PM
Old 01-28-2009
Quote:
Originally Posted by hembergb
Unfortunately, I have always had someone else to do the make files for my previous projects so I don't know how to create one for myself. That's why I thought the GNU tool would be ideal - it looks to me I just have to add a couple of parameters and the rest is done for me.
That was my intention when I used to use kdevelop, but it turns out that automake was finicky, impenetrable, slow(most projects can be compiled in their entirety several times over in the time configure spends checking the same things it checked the last 9000 times it ran), gigantic(probably larger than your project by a factor of ten or more), too often broke down for no good reason, inflexible(uh-oh, I need to add a new library -- time to regenerate my project from scratch!)... automake's next version upgrade obliterated all my projects when their scripts broke compatibility, forcing me to either recreate everything from scratch or just buckle down and learn makefiles already.

Makefiles turned out to be easy. autoconf just makes them look hard because it's so enormous and takes so many steps and spews so much clutter to do so little.

All a makefile does, is describe what files to turn into what files. It already has built-in rules to do most of what else you need. Here's a short example makefile that can transform a.cpp through f.cpp into 'executable' just by running 'make'.

Code:
# This file must be named Makefile and placed in the same dir as a.cpp through f.cpp

# The list of object files.  We don't need to tell it a.cpp, since
# make knows .o can be made from .c or .cpp and will search for it.
OBJS=a.o b.o c.o d.o e.o f.o

# Compiler flags go here.
CFLAGS=
# C++ specific compiler flags go here.  CFLAGS gets copied in.
CXXFLAGS=$(CFLAGS)
# Linker flags go here.  For example, let's link in the math library.
LDFLAGS=-lm

# Here we tell make that it needs a.o through f.o to build 'executable'.
# If it doesn't find them, it will build them.
# Note that there is a TAB in front of g++, not eight spaces.
executable:$(OBJS)
        g++ $(OBJS) $(LDFLAGS) -o executable
# Running 'make clean' will cause it to delete the objects and executable.
clean:
        rm -f $(OBJS) executable

 

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MKDEP(1)						    BSD General Commands Manual 						  MKDEP(1)

NAME
mkdep -- construct Makefile dependency list SYNOPSIS
mkdep [-ap] [-f file] [flags] file [...] DESCRIPTION
mkdep takes a set of flags for the C compiler and a list of C source files as arguments and constructs a set of include file dependencies which are written into the file ``.depend''. An example of its use in a Makefile might be: CFLAGS= -O -I../include SRCS= file1.c file2.c depend: mkdep ${CFLAGS} ${SRCS} where the macro SRCS is the list of C source files and the macro CFLAGS is the list of flags for the C compiler. The options are as follows: -a Append to the output file, so that multiple mkdep's may be run from a single Makefile. -f file Write the include file dependencies to file, instead of the default ``.depend''. -p Cause mkdep to produce dependencies of the form: program: program.c so that subsequent makes will produce program directly from its C module rather than using an intermediate .o module. This is useful for programs whose source is contained in a single module. SEE ALSO
cc(1), cpp(1), make(1) FILES
.depend file containing list of dependencies HISTORY
The mkdep command appeared in 4.3BSD-Tahoe. 4.2 Berkeley Distribution June 6, 1993 4.2 Berkeley Distribution
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