Simple Makefile Problem (with a dependency)


 
Thread Tools Search this Thread
Top Forums Programming Simple Makefile Problem (with a dependency)
# 1  
Old 02-05-2009
Simple Makefile Problem (with a dependency)

Hi all,

I have 4 '.cpp' files and 1 header files:


Code:
Tools.cpp
Code1.cpp
Code2.cpp
Code3.cpp

and Tools.hh

Now all
Code:
Code1.cpp, Code2.cpp, Code3.cpp

use functions stored in
Code:
Tools.cpp

.

Currently, what I do to compile all of them is using
this simple shell script:

Code:
#!/bin/bash
echo "compiling Code1.cpp";
g++ Code1.cpp Tools.cpp -o Code1

echo "compiling Code2.cpp";
g++ Code2.cpp Tools.cpp -o Code2 

echo "compiling Code3.cpp";
g++ Code3.cpp Tools.cpp -o Code3

It all works fine.

Now I want to do that using a standard makefile.
But why this doesnt' work:

Code:
XX = g++

TOOLSRC = Tools.cpp Code1.cpp Code2.cpp \
Code3.cpp    

TOOLSINC = Tools.hh      

all: Code1 Code2 Code3

Code1: $(TOOLSRC) $(TOOLSINC) makefile
                $(CXX)   

Code2: $(TOOLSRC) $(TOOLSINC) makefile
                $(CXX)   

Code3: $(TOOLSRC) $(TOOLSINC) makefile
                $(CXX)


The error I got is this:
Code:
g++
i686-apple-darwin9-g++-4.0.1: no input files
make: *** [Code1] Error 1

# 2  
Old 02-06-2009
You need to think about what the chain of dependencies really are:

The executable Code1 depends on the object files Code1.o and Tools.o
The object file Code1.o depends on the source files Code1.cpp and Tools.hh and the makefile
The object file Tools.o depends on the source files Tools.cpp and Tools.hh and the makefile.

So a simple makefile could be something like
Code:
%.o: %.c Tools.hh makefile

Code1: Code1.o Tools.o
Code2: Code2.o Tools.o
Code3: Code3.o Tools.o

This uses
- a pattern rule to say that any .o depends on the corresponding .cpp and the header and the makefile
- rules to say that Code1 depends on Code1.o and Tools.o
- implicit rules to do the compilation and linking (make knows it needs to use g++ to compile, and so on)

If you want to specify the compilation or linking rules yourself, then you have to specify the complete command. You had
Code:
Code3: $(TOOLSRC) $(TOOLSINC) makefile
                $(CXX)

where your rule is just "g++" with no arguments. That's like typing just g++ on the command line, hence the error message, You need to have the same thing as you would type on the command line, e.g.
Code:
        $(CXX) Code3.o Tools.o -o Code3

or if you want to be fancy and more general with automatic variables
Code:
        $(CXX) $^ -o $@

Login or Register to Ask a Question

Previous Thread | Next Thread

10 More Discussions You Might Find Interesting

1. Shell Programming and Scripting

Simple Makefile for LaTeX

I create figures using Gnuplot, but I use terminal epslatex, which produces a .tex file as output. I then latex this .tex file which creates are .dvi file, which I then convert to .ps and finally to an .eps file. Anyway here's what I'm doing in steps gnuplot plot.gplt (this writes out... (2 Replies)
Discussion started by: lost.identity
2 Replies

2. Emergency UNIX and Linux Support

Problem With Makefile

I had created a Makefile for my project. my project file hierarchy is like this: 1. a source folder with main.c and Makefile in it 2. and a top level Makefile here is the Makefile in src folder all: program program: main.c gcc -o program main.c clean: rm programand here is top... (3 Replies)
Discussion started by: majid.merkava
3 Replies

3. Homework & Coursework Questions

Help with Simple Multi-Level Makefile (Extremely New at Makefile)

Use and complete the template provided. The entire template must be completed. If you don't, your post may be deleted! 1. The problem statement, all variables and given/known data: Basically, the prompt is make a makefile with various sub makefiles in their respective subdirectories. All code... (1 Reply)
Discussion started by: Tatl
1 Replies

4. Programming

Problem with Makefile

Hi, Here is my makefile http://pastie.org/1104332. I am trying to compile different .c files and .s files (assembly files) from different sub directories into E:/em35x/build/mfg-sample-app-cortexm3-iar-em357-em3xx-dev0680/ then the linker should link all the .o files from the build directory... (1 Reply)
Discussion started by: blade2008
1 Replies

5. Infrastructure Monitoring

Weird dependency problem!

Hi, I want to install net-snmp-devel package but i have following dependecy problem. It's very odd, i don't get it. One of packages is depended on the other one, the other one is depended on the previous one as well. :S :S Could you help me please? Here are the steps: # ls -l total... (4 Replies)
Discussion started by: oduth
4 Replies

6. UNIX for Advanced & Expert Users

Makefile problem - How to run module load in a Makefile

Hi, I'm trying to run the module load command in a Makefile and i'm getting the following error: make: module: command not found Why is this? Is there any way to run this command in a Makefile? NOTE: command - module load msjava/sunjdk/1.5.0 works fine outside of the Makefile (2 Replies)
Discussion started by: hernandinho
2 Replies

7. Solaris

Dependency problem

Hi all am new to solaris ............ i installed amanda client pkg that time am getting lots of dependency problem.......... is there any Yum server like things in solaris Regards ' prAn (8 Replies)
Discussion started by: pran
8 Replies

8. Programming

Problem with a Makefile

Hi, I am very new with makefile topics , maybe this is a very symple question... I have this code wich compile very good ( I get it from the net), I will call it code A. I have to add it with a program that is all ready in use, (code B) that also compile good. When I put together it doesnt... (7 Replies)
Discussion started by: pmoren
7 Replies

9. Programming

Makefile very simple question.

Hi I tried many times and I dont know what the he... is going on. Problem: I hava in /home/marcin/c1_menu/ this file: menu_item_data.c I want to compile this file. so I tried something like this CC=gcc LIBS=-lmenu -lncurses RM=rm BINS=menu_item_data %: %.o ${CC} -o $@... (1 Reply)
Discussion started by: marcintom
1 Replies

10. UNIX for Advanced & Expert Users

problem with Makefile

Hi, I have a makefile which looks like this ProcessA : commands touch pro1 ProcessB : pro1 commands touch pro2 ProcessC: pro3 commands and after some runs, i wish only pro3 to run and I check that "pro1" and "pro2" are there in the directory, but still, if i give make... (3 Replies)
Discussion started by: sskb
3 Replies
Login or Register to Ask a Question