pmc.iaf(3) [freebsd man page]
PMC.IAF(3) BSD Library Functions Manual PMC.IAF(3) NAME
pmc.iaf -- measurement events for Intel fixed function performance counters. LIBRARY
Performance Counters Library (libpmc, -lpmc) SYNOPSIS
#include <pmc.h> DESCRIPTION
Intel fixed-function PMCs are present in CPUs that conform to version 2 or later of the Intel Performance Measurement Architecture. Each fixed-function PMC measures a specific hardware event. The number of fixed-function PMCs implemented in a CPU can vary. The number of fixed-function PMCs present can be determined at runtime by using function pmc_cpuinfo(3). Intel fixed-function PMCs are documented in "Volume 3: System Programming Guide", IA-32 Intel(R) Architecture Software Developer's Manual, Order Number 253669-027US, Intel Corporation, July 2008. PMC Capabilities Fixed-function PMCs support the following capabilities: Capability Support PMC_CAP_CASCADE No PMC_CAP_EDGE No PMC_CAP_INTERRUPT Yes PMC_CAP_INVERT No PMC_CAP_READ Yes PMC_CAP_PRECISE No PMC_CAP_SYSTEM Yes PMC_CAP_TAGGING No PMC_CAP_THRESHOLD No PMC_CAP_USER Yes PMC_CAP_WRITE Yes Class Name Prefix These PMCs are named using a class name prefix of ``iaf-''. Event Qualifiers (Fixed Function PMCs) These PMCs support the following modifiers: os Configure the PMC to count events occurring at ring level 0. usr Configure the PMC to count events occurring at ring levels 1, 2 or 3. anythread (Atom CPUs) Configure the PMC to count events on all logical processors sharing a processor core. The default is to count events on the current logical processor. If neither of the ``os'' or ``usr'' qualifiers are specified, the default is to enable both. Event Specifiers (Fixed Function PMCs) The fixed function PMCs are selectable using the following event names: INSTR_RETIRED.ANY (Fixed Function Counter 0) The number of instructions retired. CPU_CLK_UNHALTED.CORE (Fixed Function Counter 1) The number of core cycles for which the core is not halted. CPU_CLK_UNHALTED.REF (Fixed Function Counter 2) The number of reference cycles for which the core is not halted. EXAMPLES
To measure the number of core cycles for which the core was not halted use the event specifier "iaf-cpu-clk-unhalted.core". To measure the number of user instructions retired use the event specifier "iaf-instr-retired.any,usr". To measure the number of user instructions retired on all logical processors in an Atom CPU, use the event specifier "iaf-instr-retired.any,usr,anythread". SEE ALSO
pmc(3), pmc.atom(3), pmc.core(3), pmc.core2(3), pmc.k7(3), pmc.k8(3), pmc.p4(3), pmc.p5(3), pmc.p6(3), pmc.soft(3), pmc.tsc(3), pmc_cpuinfo(3), pmclog(3), hwpmc(4) HISTORY
The pmc library first appeared in FreeBSD 6.0. AUTHORS
The Performance Counters Library (libpmc, -lpmc) library was written by Joseph Koshy <jkoshy@FreeBSD.org>. BSD
November 14, 2008 BSD
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PMC.HASWELLUC(3) BSD Library Functions Manual PMC.HASWELLUC(3) NAME
pmc.haswelluc -- uncore measurement events for Intel Haswell family CPUs LIBRARY
Performance Counters Library (libpmc, -lpmc) SYNOPSIS
#include <pmc.h> DESCRIPTION
Intel Haswell CPUs contain PMCs conforming to version 3 of the Intel performance measurement architecture. These CPUs contain two classes of PMCs: PMC_CLASS_UCF Fixed-function counters that count only one hardware event per counter. PMC_CLASS_UCP Programmable counters that may be configured to count one of a defined set of hardware events. The number of PMCs available in each class and their widths need to be determined at run time by calling pmc_cpuinfo(3). Intel Haswell PMCs are documented in "Combined Volumes: 1, 2A, 2B, 2C, 3A, 3B and 3C", Intel(R) 64 and IA-32 Architectures Software Developers Manual, Order Number: 325462-045US, Intel Corporation, January 2013. HASWELL UNCORE FIXED FUNCTION PMCS These PMCs and their supported events are documented in pmc.ucf(3). Not all CPUs in this family implement fixed-function counters. HASWELL UNCORE PROGRAMMABLE PMCS The programmable PMCs support the following capabilities: Capability Support PMC_CAP_CASCADE No PMC_CAP_EDGE Yes PMC_CAP_INTERRUPT No PMC_CAP_INVERT Yes PMC_CAP_READ Yes PMC_CAP_PRECISE No PMC_CAP_SYSTEM No PMC_CAP_TAGGING No PMC_CAP_THRESHOLD Yes PMC_CAP_USER No PMC_CAP_WRITE Yes Event Qualifiers Event specifiers for these PMCs support the following common qualifiers: cmask=value Configure the PMC to increment only if the number of configured events measured in a cycle is greater than or equal to value. edge Configure the PMC to count the number of de-asserted to asserted transitions of the conditions expressed by the other qualifiers. If specified, the counter will increment only once whenever a condition becomes true, irrespective of the number of clocks during which the condition remains true. inv Invert the sense of comparison when the ``cmask'' qualifier is present, making the counter increment when the number of events per cycle is less than the value specified by the ``cmask'' qualifier. Event Specifiers (Programmable PMCs) Haswell programmable PMCs support the following events: UNC_CBO_XSNP_RESPONSE.MISS (Event 22H, Umask 01H) A snoop misses in some processor core. UNC_CBO_XSNP_RESPONSE.INVAL (Event 22H, Umask 02H) A snoop invalidates a non-modified line in some processor core. UNC_CBO_XSNP_RESPONSE.HIT (Event 22H, Umask 04H) A snoop hits a non-modified line in some processor core. UNC_CBO_XSNP_RESPONSE.HITM (Event 22H, Umask 08H) A snoop hits a modified line in some processor core. UNC_CBO_XSNP_RESPONSE.INVAL_M (Event 22H, Umask 10H) A snoop invalidates a modified line in some processor core. UNC_CBO_XSNP_RESPONSE.EXTERNAL_FILTER (Event 22H, Umask 20H) Filter on cross-core snoops initiated by this Cbox due to external snoop request. UNC_CBO_XSNP_RESPONSE.XCORE_FILTER (Event 22H, Umask 40H) Filter on cross-core snoops initiated by this Cbox due to processor core memory request. UNC_CBO_XSNP_RESPONSE.EVICTION_FILTER (Event 22H, Umask 80H) Filter on cross-core snoops initiated by this Cbox due to LLC eviction. UNC_CBO_CACHE_LOOKUP.M (Event 34H, Umask 01H) LLC lookup request that access cache and found line in M-state. UNC_CBO_CACHE_LOOKUP.ES (Event 34H, Umask 06H) LLC lookup request that access cache and found line in E or S state. UNC_CBO_CACHE_LOOKUP.I (Event 34H, Umask 08H) LLC lookup request that access cache and found line in I-state. UNC_CBO_CACHE_LOOKUP.READ_FILTER (Event 34H, Umask 10H) Filter on processor core initiated cacheable read requests. Must combine with at least one of 01H, 02H, 04H, 08H. UNC_CBO_CACHE_LOOKUP.WRITE_FILTER (Event 34H, Umask 20H) Filter on processor core initiated cacheable write requests. Must combine with at least one of 01H, 02H, 04H, 08H. UNC_CBO_CACHE_LOOKUP.EXTSNP_FILTER (Event 34H, Umask 40H) Filter on external snoop requests. Must combine with at least one of 01H, 02H, 04H, 08H. UNC_CBO_CACHE_LOOKUP.ANY_REQUEST_FILTER (Event 34H, Umask 80H) Filter on any IRQ or IPQ initiated requests including uncacheable, non-coherent requests. Must combine with at least one of 01H, 02H, 04H, 08H. UNC_ARB_TRK_OCCUPANCY.ALL (Event 80H, Umask 01H) Counts cycles weighted by the number of requests waiting for data returning from the memory controller. Accounts for coherent and non-coherent requests initiated by IA cores, processor graphic units, or LLC. UNC_ARB_TRK_REQUEST.ALL (Event 81H, Umask 01H) Counts the number of coherent and in-coherent requests initiated by IA cores, processor graphic units, or LLC. UNC_ARB_TRK_REQUEST.WRITES (Event 81H, Umask 20H) Counts the number of allocated write entries, include full, partial, and LLC evictions. UNC_ARB_TRK_REQUEST.EVICTIONS (Event 81H, Umask 80H) Counts the number of LLC evictions allocated. UNC_ARB_COH, Umask TRK_OCCUPANCY.ALL (Event 83H, Umask 01H) Cycles weighted by number of requests pending in Coherency Tracker. UNC_ARB_COH, Umask TRK_REQUEST.ALL (Event 84H, Umask 01H) Number of requests allocated in Coherency Tracker. SEE ALSO
pmc(3), pmc.atom(3), pmc.core(3), pmc.corei7(3), pmc.corei7uc(3), pmc.haswell(3), pmc.iaf(3), pmc.k7(3), pmc.k8(3), pmc.p4(3), pmc.p5(3), pmc.p6(3), pmc.sandybridge(3), pmc.sandybridgeuc(3), pmc.sandybridgexeon(3), pmc.soft(3), pmc.tsc(3), pmc.ucf(3), pmc.westmere(3), pmc.westmereuc(3), pmc_cpuinfo(3), pmclog(3), hwpmc(4) HISTORY
The pmc library first appeared in FreeBSD 6.0. AUTHORS
The Performance Counters Library (libpmc, -lpmc) library was written by Joseph Koshy <jkoshy@FreeBSD.org>. The support for the Haswell microarchitecture was added by Hiren Panchasara <hiren.panchasara@gmail.com>. BSD
March 22, 2013 BSD