CPU_ELAN(4) BSD/i386 Kernel Interfaces Manual CPU_ELAN(4)NAME
CPU_ELAN -- AMD Elan 520 CPU support
SYNOPSIS
options CPU_ELAN
options CPU_ELAN_PPS
options CPU_ELAN_XTAL
machdep.elan_gpio_config
machdep.elan_freq
options CPU_SOEKRIS
DESCRIPTION
The options CPU_ELAN enables support for the AMD Elan 520 CPU.
A device /dev/elan-mmcr exports the MMCR register bank to userland using mmap(2).
The i8254 timer will be adjusted to the slightly unorthodox frequency 1189161 Hz (32768 * 45 * 25 / 31) employed by the Elan.
A timecounter named ``ELAN'' is implemented using the general purpose timer 2, but it will not be usable unless HZ is configured at 150 or
higher. This timecounter is much better than the ``i8254'' timecounter and should be used at all times.
The machdep.elan_gpio_config sysctl(8) variable enables configuration of the GPIO pins of the CPU. The string must be exactly 32 characters
long. A '-' means the GPIO is unavailable. A 'l' (lower-case ell) configures a led(4) device (active low). A 'L' configures a led(4)
device (active high). A '.' means no configuration for this GPIO. These led(4) devices will be named /dev/led/gpio%d. For meaning of 'P',
'e' and 'E', see under options CPU_ELAN_PPS.
The options CPU_ELAN_XTAL and the machdep.elan_freq sysctl(8) variable can be used to set the CPU clock crystal frequency in Hz. The default
is 33333333 Hz.
The options CPU_ELAN_PPS enables precision timestamping using the RFC2783 PPS-API via the /dev/elan-mmcr device. The resolution will be
approximately 125 nsec and the precision +- 125 nsec. (For 125 nsec read ``4 / CPU clock crystal frequency''.)
The input signal must be connected to the TMR1IN pin and a GPIO pin. The GPIO pin must be configured with a 'P' in machdep.elan_gpio_config.
In addition, one GPIO pin can be configured with either 'e' (active low) or 'E' (active high) to become a ``echo'' output of the input sig-
nal. Please notice that this signal is not suitable for calibration.
If the options CPU_SOEKRIS is given, the support will additionally be tailored to the Soekris Engineering 45xx series of embedded computers.
The ``error'' led will be configured (as /dev/led/error) and the GPIO pins which are not available will be disabled.
SEE ALSO led(4), sysctl(8)HISTORY
The CPU_ELAN code first appeared in FreeBSD 4.7.
AUTHORS
Poul-Henning Kamp <phk@FreeBSD.org>
BSD November 23, 2003 BSD
Check Out this Related Man Page
GPIOIIC(4) BSD Kernel Interfaces Manual GPIOIIC(4)NAME
gpioiic -- GPIO I2C bit-banging device driver
SYNOPSIS
To compile this driver into the kernel, place the following lines in your kernel configuration file:
device gpio
device gpioiic
device iic
device iicbb
device iicbus
DESCRIPTION
The gpioiic driver provides an IIC bit-banging interface using two GPIO pins for the SCL and SDA on the gpiobus. gpioiic implements an open
collector kind of output, as recommended by the standard, when driving the pins on the gpiobus, i.e, they are never switched to the logical
value of '1', or they are '0' or simply open (Hi-Z/tri-state). So the pullup resistors are required so gpioiic can work.
On a device.hints(5) based system, like MIPS, these values are configurable for the gpioiic:
hint.gpioiic.%d.at The gpiobus you are attaching to. Normally just gpiobus0.
hint.gpioiic.%d.pins This is a bitmask of the pins on the gpiobus that are to be used for SCLOCK and SDATA from the GPIO IIC bit-banging
bus. To configure pin 0 and 7, use the bitmask of 0b10000001 and convert it to a hexadecimal value of 0x0081. Please
note that this mask should only ever have two bits set (any other bits - i.e., pins - will be ignored).
hint.gpioiic.%d.scl Indicates which bit in the hint.gpioiic.%d.pins should be used as the SCLOCK source. Optional, defaults to 0.
hint.gpioiic.%d.sda Indicates which bit in the hint.gpioiic.%d.pins should be used as the SDATA source. Optional, defaults to 1.
On a FDT(4) based system, like ARM, the DTS part for a gpioiic device usually looks like:
gpio: gpio {
gpio-controller;
...
gpioiic0 {
compatible = "gpioiic";
/*
* Attach to GPIO pins 21 and 22. Set them
* initially as inputs.
*/
gpios = <&gpio 21 1 0
&gpio 22 1 0>;
scl = <0>; /* GPIO pin 21 - optional */
sda = <1>; /* GPIO pin 22 - optional */
/* This is an example of a gpioiic child. */
gpioiic-child0 {
compatible = "lm75";
i2c-address = <0x4f>;
};
};
};
Where:
compatible Should always be set to "gpioiic".
gpios The gpios property indicates which GPIO pins should be used for SCLOCK and SDATA on the GPIO IIC bit-banging bus. For more
details about the gpios property, please consult /usr/src/sys/boot/fdt/dts/bindings-gpio.txt.
scl The scl option indicates which bit in the gpios should be used as the SCLOCK source. Optional, defaults to 0.
sda The sda option indicates which bit in the gpios should be used as the SDATA source. Optional, defaults to 1.
SEE ALSO fdt(4), gpio(4), gpioled(4), iic(4), iicbb(4), iicbus(4)HISTORY
The gpioiic manual page first appeared in FreeBSD 10.1.
AUTHORS
This manual page was written by Luiz Otavio O Souza.
BSD May 14, 2014 BSD