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Make - two target produced by one recipe

 
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# 1  
Old 01-18-2011
Make - two target produced by one recipe
Suppose executable X produces files A and B from nothing, Y produces C from A, Z produces D from B, and my final goal is to produce C and D. I wrote the following makefile:

.PHONY: all
all: C D

C: A
Y A
D: B
Z B
A B:
X
This makefile seems to reflect all dependencies, as it should be. However if I delete A and B, then X will be executed twice.

How do I fix this file so that it still reflects all dependencies, but in any case executes X only once?

Thanks in advance
# 2  
Old 01-18-2011
If you post in code tags, you won't need to use excessive amounts of spaces to indent things. [ code ] stuff [ /code ] without the extra spaces in the tags.

What version of make do you have? I don't get this behavior:

Code:
$ make --version
GNU Make 3.81
Copyright (C) 2006  Free Software Foundation, Inc.
This is free software; see the source for copying conditions.
There is NO warranty; not even for MERCHANTABILITY or FITNESS FOR A
PARTICULAR PURPOSE.

This program built for i686-pc-linux-gnu

$ cat Makefile
.PHONY: all
all: C D

C: A
        touch C

D: B
        touch D

A B:
        touch A B
$ make
touch A B
touch C
touch D
$ rm A B
$ make
touch A B
touch C
touch D
$

This minimal example of yours might be a little too minimal to show the actual problem.
# 3  
Old 01-18-2011
I use version 3.82. Indeed my example must be too minimal - I receive the same behavior as you do. I'll reinvestigate my real problem. Thanks anyway!
 
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