I am trying to come up with a makefile where the target is linked with object files produced by C and C++ sources.
My setup is Ubuntu/gcc:
$ uname -a
Linux srvr1 2.6.24-24-server #1 SMP Fri Sep 18 17:24:10 UTC 2009 i686 GNU/Linux
gcc version 4.2.4
$ cat main.cpp
$ cat client.c
$ cat makefile
$ make
Question #1: why CPPFLAGS are used for the compilation of client.c - even though it correctly uses 'cc', not 'g++' for C file?
Question #2: why it failed to use C++ related stuff when linking?
I do have a working makefile, where I explicitly say to use g++ and it works, see below:
But I'd like to keep it simple, as the actual build has many more different modules and I'd hate to have to write a target for every single one of them.
One more piece of info - actual CPPFLAGS need to be different from CPFLAGS, as some that I need are not supported by C compiler, such as -Wno-non-virtual-dtor
Any suggestions?
You shouldn't need any rules to make .o files -- leave them out. make will know to build something.o from something.c or something.cpp as long as something else needs something.o make will also use CFLAGS for .c and CXXFLAGS for .cpp by default.
For the rule building tester, use $(CXX), not $(CC). If you have even one C++ object among there it needs C++ linking.
The $(CXX) did the trick, thanks! Linker is happy.
One remaining issue is that CPPFLAGS are being applied to the plain C compilation, see below:
$ make
I'd like to see client.c compiled as follows:
as my CFLAGS is set to -g only.
Is it possible to hint make to use CPPFLAGS for C++ and CFLAGS for C files?
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