Query: struct_nand_hw_control
OS: suse
Section: 9
Format: Original Unix Latex Style Formatted with HTML and a Horizontal Scroll Bar
STRUCTNAND_HW_CONTR(9) Structures STRUCT NAND_HW_CONTR(9)NAMEstruct_nand_hw_control - Control structure for hardware controller (e.g ECC generator) shared among independent devicesSYNOPSISstruct nand_hw_control { spinlock_t lock; struct nand_chip * active; wait_queue_head_t wq; };MEMBERSlock protection lock active the mtd device which holds the controller currently wq wait queue to sleep on if a NAND operation is in progress used instead of the per chip wait queue when a hw controller is availableAUTHORThomas Gleixner <tglx@linutronix.de> Author.COPYRIGHTKernel Hackers Manual 2.6. July 2010 STRUCT NAND_HW_CONTR(9)
| Related Man Pages |
|---|
| struct_irq_chip(9) - centos |
| struct_irq_chip_generic(9) - centos |
| struct_nand_ecc_ctrl(9) - centos |
| struct_platform_nand_ctrl(9) - centos |
| struct_spi_board_info(9) - centos |
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