Man Page: pci_set_cacheline_size
Operating Environment: suse
Section: 9
PCI_SET_CACHELINE_SI(9) Hardware Interfaces PCI_SET_CACHELINE_SI(9)NAMEpci_set_cacheline_size - ensure the CACHE_LINE_SIZE register is programmedSYNOPSISint pci_set_cacheline_size(struct pci_dev * dev);ARGUMENTSdev the PCI device for which MWI is to be enabledDESCRIPTIONHelper function for pci_set_mwi. Originally copied from drivers/net/acenic.c. Copyright 1998-2001 by Jes Sorensen, <jestrained-monkey.org>.RETURNSAn appropriate -ERRNO error value on error, or zero for success.COPYRIGHTKernel Hackers Manual 2.6. July 2010 PCI_SET_CACHELINE_SI(9)
| Related Man Pages |
|---|
| device_create_vargs(9) - centos |
| device_schedule_callback_owner(9) - centos |
| parport_register_port(9) - suse |
| struct_device_driver(9) - centos |
| device_create(9) - suse |