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i2o_pci_alloc(9) [suse man page]

I2O_PCI_ALLOC(9)					       Message-based devices						  I2O_PCI_ALLOC(9)

NAME
i2o_pci_alloc - Allocate DMA memory, map IO memory for I2O controller SYNOPSIS
int i2o_pci_alloc(struct i2o_controller * c); ARGUMENTS
c I2O controller DESCRIPTION
Allocate DMA memory for a PCI (or in theory AGP) I2O controller. All IO mappings are also done here. If MTRR is enabled, also do add memory regions here. Returns 0 on success or negative error code on failure. COPYRIGHT
Kernel Hackers Manual 2.6. July 2010 I2O_PCI_ALLOC(9)

Check Out this Related Man Page

CMDIDE(4)						   BSD Kernel Interfaces Manual 						 CMDIDE(4)

NAME
cmdide -- CMD Technology and Silicon Image IDE disk controllers driver SYNOPSIS
cmdide* at pci? dev ? function ? flags 0x0000 options PCIIDE_CMD064x_DISABLE options PCIIDE_CMD0646U_ENABLEUDMA DESCRIPTION
The cmdide driver supports the CMD Technology PCI0640, PCI0643, PCI0646, PCI0648, PCI0649, and Silicon Image 0680 IDE controllers, and pro- vides the interface with the hardware for the ata(4) driver. The 0x0002 flag forces the cmdide driver to disable DMA on chipsets for which DMA would normally be enabled. This can be used as a debugging aid, or to work around problems where the IDE controller is wired up to the system incorrectly. SEE ALSO
ata(4), atapi(4), intro(4), pci(4), pciide(4), wd(4), wdc(4) BUGS
There's no way to reliably know if a PCI064x controller is enabled or not. If the driver finds a PCI064x, it will assume it is enabled unless the PCIIDE_CMD064x_DISABLE option is specified in the kernel config file. This will be a problem only if the controller has been dis- abled in the BIOS and another controller has been installed and uses the ISA legacy I/O ports and interrupts. The PCI0646U controller is known to be buggy with Ultra-DMA transfers, so Ultra-DMA is disabled by default for this controller. To enable Ultra-DMA, use the PCIIDE_CMD0646U_ENABLEUDMA option. Ultra-DMA can eventually be disabled on a per-drive basis with config flags, see wd(4). The timings used for the PIO and DMA modes for controllers listed above are for a PCI bus running at 30 or 33 MHz. This driver may not work properly on overclocked systems. BSD
December 13, 2003 BSD
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