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openssl_ia32cap(3) [osx man page]

OPENSSL_ia32cap(3)						      OpenSSL							OPENSSL_ia32cap(3)

NAME
OPENSSL_ia32cap - finding the IA-32 processor capabilities SYNOPSIS
unsigned long *OPENSSL_ia32cap_loc(void); #define OPENSSL_ia32cap (*(OPENSSL_ia32cap_loc())) DESCRIPTION
Value returned by OPENSSL_ia32cap_loc() is address of a variable containing IA-32 processor capabilities bit vector as it appears in EDX register after executing CPUID instruction with EAX=1 input value (see Intel Application Note #241618). Naturally it's meaningful on IA-32[E] platforms only. The variable is normally set up automatically upon toolkit initialization, but can be manipulated afterwards to modify crypto library behaviour. For the moment of this writing six bits are significant, namely: 1. bit #28 denoting Hyperthreading, which is used to distiguish cores with shared cache; 2. bit #26 denoting SSE2 support; 3. bit #25 denoting SSE support; 4. bit #23 denoting MMX support; 5. bit #20, reserved by Intel, is used to choose between RC4 code pathes; 6. bit #4 denoting presence of Time-Stamp Counter. For example, clearing bit #26 at run-time disables high-performance SSE2 code present in the crypto library. You might have to do this if target OpenSSL application is executed on SSE2 capable CPU, but under control of OS which does not support SSE2 extentions. Even though you can manipulate the value programmatically, you most likely will find it more appropriate to set up an environment variable with the same name prior starting target application, e.g. on Intel P4 processor 'env OPENSSL_ia32cap=0x12900010 apps/openssl', to achieve same effect without modifying the application source code. Alternatively you can reconfigure the toolkit with no-sse2 option and recompile. 50 2013-03-05 OPENSSL_ia32cap(3)

Check Out this Related Man Page

cpu_capabilities(3alleg4)					  Allegro manual					 cpu_capabilities(3alleg4)

NAME
cpu_capabilities - Contains the capability flags of the CPU. Allegro game programming library. SYNOPSIS
#include <allegro.h> extern int cpu_capabilities; DESCRIPTION
Contains CPU flags indicating what features are available on the current CPU. The flags can be any combination of these: CPU_ID - Indicates that the "cpuid" instruction is available. If this is set, then all Allegro CPU variables are 100% reliable, otherwise there may be some mistakes. CPU_FPU - An FPU is available. CPU_IA64 - Running on Intel 64 bit CPU CPU_AMD64 - Running on AMD 64 bit CPU CPU_MMX - Intel MMX instruction set is available. CPU_MMXPLUS - Intel MMX+ instruction set is available. CPU_SSE - Intel SSE instruction set is available. CPU_SSE2 - Intel SSE2 instruction set is available. CPU_SSE3 - Intel SSE3 instruction set is available. CPU_3DNOW - AMD 3DNow! instruction set is available. CPU_ENH3DNOW - AMD Enhanced 3DNow! instruction set is available. CPU_CMOV - Pentium Pro "cmov" instruction is available. You can check for multiple features by OR-ing the flags together. For example, to check if the CPU has an FPU and MMX instructions avail- able, you'd do: if ((cpu_capabilities & (CPU_FPU | CPU_MMX)) == (CPU_FPU | CPU_MMX)) { printf("CPU has both an FPU and MMX instructions! "); } You can read this variable after you have called check_cpu() (which is automatically called by allegro_init()). SEE ALSO
check_cpu(3alleg4), cpu_vendor(3alleg4), cpu_family(3alleg4), cpu_model(3alleg4), cpu_capabilities(3alleg4), allegro_init(3alleg4) Allegro version 4.4.2 cpu_capabilities(3alleg4)
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