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addlocap(3) [opendarwin man page]

ADDLOCAP(3)						       MBK LOGICAL FUNCTIONS						       ADDLOCAP(3)

NAME
addlocap - create a logical capacitor ORIGIN
This software belongs to the ALLIANCE CAD SYSTEM developed by the ASIM team at LIP6 laboratory of Universite Pierre et Marie CURIE, in Paris, France. Web : http://asim.lip6.fr/recherche/alliance/ E-mail : alliance-users@asim.lip6.fr SYNOPSYS
#include "mlo.h" locap_list *addlocap(ptfig,type,capa,tcon,bcon,name) lofig_list *ptfig ; char type ; double capa ; losig_list *tcon, *bcon ; const char *name ; PARAMETERS
ptfig Pointer to the figure in which the capacitor should be added type Capacitor type capa Capacitance value in Farads tcon Pointer to the signal to be connected on the capacitor top plate bcon Pointer to the signal to be connected on the capacitor bottom plate name Capacitor instance name DESCRIPTION
addlocap creates a new capacitor, and adds it to the list of capacitors pointed to by ptfig -> LOCAP. The new capacitor is added in front of the list, and becomes itself the list head. The type parameter can take two values : CAPMIM for a metal/metal capacitor (the top plate and the bottom plate layers are different metal layers) CAPPNWELL for a POLY/NWELL capacitor (if available in the technology). The top plate layer is POLY, bottom plate is NWELL. The capa argument is the capacitance value in Farads. Two connectors are created each time a capacitor is added, and the tcon and bcon losigs are attached to the SIG field of the locon of the appropriate connector. The connectors names are tcon (top plate) and bcon (bottom plate); their direction, DIR, are set to 'P', and their TYPE INTERNAL. For details on the structures, see locon(3) and locap(3). RETURN VALUE
addlocap returns a pointer to the newly created capacitor. ERRORS
"*** mbk error *** illegal capacitor type : type" The type is not a legal capacitor type. EXAMPLE
#include "mlo.h" void parallel_capacitors(void) /* netlist of two parallel capacitors */ { lofig_list *pt = NULL ; losig_list *in = NULL ; losig_list *out = NULL ; pt = addlofig("parallel_capacitors") ; addlocon(pt,"in",in = givelosig(pt,0),IN) ; addlocon(pt,"out",out = givelosig(pt,1),OUT) ; addlocap(pt,CAPMIM,0.5e-6,in,out,"cap1") ; addlocap(pt,CAPMIM,0.5e-6,in,out,"cap2") ; } SEE ALSO
mbk(1), lofig(3), locap(3), locon(3), dellocap(3). BUG REPORT
This tool is under development at the ASIM department of the LIP6 laboratory. We need your feedback to improve documentation and tools. ASIM
/LIP6 August 14, 2002 ADDLOCAP(3)

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ADDLORES(3)						       MBK LOGICAL FUNCTIONS						       ADDLORES(3)

NAME
addlores - create a logical resistor ORIGIN
This software belongs to the ALLIANCE CAD SYSTEM developed by the ASIM team at LIP6 laboratory of Universite Pierre et Marie CURIE, in Paris, France. Web : http://asim.lip6.fr/recherche/alliance/ E-mail : alliance-users@asim.lip6.fr SYNOPSYS
#include "mlo.h" lores_list *addlores(ptfig,type,resi,rcon1,rcon2,name) lofig_list *ptfig ; char type ; double resi ; losig_list *rcon1, *rcon2 ; const char *name ; PARAMETERS
ptfig Pointer to the figure in which the resistor should be added type Resistor type resi Resistor value in Ohms rcon1 Pointer to the signal to be connected on the resistor top plate rcon2 Pointer to the signal to be connected on the resistor bottom plate name Resistor instance name DESCRIPTION
addlores creates a new resistor, and adds it to the list of resistors pointed to by ptfig -> LORES. The new resistor is added in front of the list, and becomes itself the list head. The type parameter can take one value : RESMIM for a metal resistor The resi argument is the resistor value in Ohms. Two connectors are created each time a resistor is added, and the rcon1 and rcon2 losigs are attached to the SIG field of the locon of the appropriate connector. The connectors names are rcon1 and rcon2; their direction, DIR, are set to 'R', and their TYPE INTERNAL. For details on the structures, see locon(3) and lores(3). RETURN VALUE
addlores returns a pointer to the newly created resistor. ERRORS
"*** mbk error *** illegal resistor type : type" The type is not a legal resistor type. EXAMPLE
#include "mlo.h" void parallel_resistors(void) /* netlist of two parallel resistors */ { lofig_list *pt = NULL ; losig_list *in = NULL ; losig_list *out = NULL ; pt = addlofig("parallel_resistors") ; addlocon(pt,"in",in = givelosig(pt,0),IN) ; addlocon(pt,"out",out = givelosig(pt,1),OUT) ; addlores(pt,RESMIM,0.2e-6,in,out,"res1") ; addlores(pt,RESMIM,0.2e-6,in,out,"res2") ; } SEE ALSO
mbk(1), lofig(3), lores(3), locon(3), dellores(3). BUG REPORT
This tool is under development at the ASIM department of the LIP6 laboratory. We need your feedback to improve documentation and tools. ASIM
/LIP6 August 14, 2002 ADDLORES(3)
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